Datasheet

74HC_HCT4020 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 5 — 6 August 2012 4 of 20
NXP Semiconductors
74HC4020; 74HCT4020
14-stage binary ripple counter
7. Functional description
[1] H = HIGH voltage level; L = LOW voltage level; X = don’t care; = LOW-to-HIGH clock transition; = HIGH-to-LOW clock transition.
7.1 Timing diagram
Table 3. Function table
Input Output
CP MR Q0, Q3 to Q13
L no change
L count
XHL
Fig 7. Timing diagram
001aal207
12 4
8
16 32 64 128 256 512 1024 2048 4096
CP input
MR input
Q0
Q3
Q4
Q5
Q6
Q7
Q8
Q9
Q10
Q11
8192 16384
Q12
Q13