Datasheet

1997 Nov 25 18
Philips Semiconductors Product specification
Phase-locked-loop with VCO 74HC/HCT4046A
VCO section
GND = 0 V; t
r
=t
f
= 6 ns; C
L
= 50 pF
t
PHZ
/
t
PLZ
3-state output disable
time SIG
IN
, COMP
IN
to PC2
OUT
36 65 81 98 ns 4.5 Fig.17
t
THL
/
t
TLH
output transition time 7 15 19 22 ns 4.5 Fig.16
V
I (p-p)
AC coupled input
sensitivity
(peak-to-peak value)
at
SIG
IN
or COMP
IN
15 mV 4.5 f
i
= 1 MHz
SYMBOL PARAMETER
T
amb
(°C)
UNIT
TEST CONDITIONS
74HCT
V
CC
(V)
OTHER
+25 −40 to +85 −40 to +125
min. typ. max min. max min. max.
∆f/T frequency stability
with temperature
change
0.15 %/K 4.5
V
I
=V
VCOIN
withi
n recommended
range;
R1 = 100 kΩ;
R2 = ∞;
C1 = 100 pF;
see Fig.18b
f
o
VCO centre frequency
(duty factor = 50%)
11.0 17.0 MHz 4.5 V
VCOIN
= 1/2 V
CC
;
R1 = 3 kΩ;
R2 = ∞;
C1 = 40 pF;
see Fig.19
∆f
VCO
VCO frequency
linearity
0.4 % 4.5 R1 = 100 kΩ;
R2 = ∞;
C1 = 100 pF;
see Figs 20
and 21
δ
VCO
duty factor at VCO
OUT
50 % 4.5
SYMBOL PARAMETER
T
amb
(°C)
UNIT
TEST CONDITIONS
74HCT
V
CC
(V)
OTHER
+25 −40 to +85 −40 to +125
min. typ. max. min. max. min. max.