Datasheet

ManualsBrandsNXP SEMICONDUCTORS ManualsLogic ICsLogic IC - Inverter Inverter 74HC SO 16

1. General description

The 74HC4049 is a hex inverter with over-voltage tolerant inputs. Inputs are overvoltage

tolerant to 15 V. This enables the device to be used in HIGH-to-LOW level shifting

applications.

2. Features and benefits

 Low-power dissipation

 Complies with JEDEC standard no. 7A

 ESD protection:

 HBM JESD22-A114F exceeds 2 000 V

 MM JESD22-A115-A exceeds 200 V

 Multiple package options

 Specified from 40 Cto+85C and from 40 Cto+125C

3. Ordering information

74HC4049

Hex inverting HIGH-to-LOW level shifter

Rev. 6 — 8 January 2013 Product data sheet

Table 1. Ordering information

Type number Package

Temperature range Name Description Version

74HC4049N 40 C to +125 C DIP16 plastic dual in-line package; 16 leads (300 mil) SOT38-4

74HC4049D 40 C to +125 C SO16 plastic small outline package; 16 leads; body width

3.9 mm

SOT109-1

74HC4049DB 40 C to +125 C SSOP16 plastic shrink small outline package; 16 leads;

body width 5.3 mm

SOT338-1

74HC4049PW 40 C to +125 C TSSOP16 plastic thin shrink small outline package; 16 leads;

body width 4.4 mm

SOT403-1

Summary of content (15 pages)

PAGE 1
74HC4049 Hex inverting HIGH-to-LOW level shifter Rev. 6 — 8 January 2013 Product data sheet 1. General description The 74HC4049 is a hex inverter with over-voltage tolerant inputs. Inputs are overvoltage tolerant to 15 V. This enables the device to be used in HIGH-to-LOW level shifting applications. 2. Features and benefits  Low-power dissipation  Complies with JEDEC standard no.
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74HC4049 NXP Semiconductors Hex inverting HIGH-to-LOW level shifter 4. Functional diagram 3 1A 2A 3A 3 2 5 4 7 6 5 1Y 2Y 7 3Y 9 4A 5A 6A 9 10 11 12 14 15 V1/V2 V1/V2 V1/V2 2 4 6 10 4Y 11 5Y 6Y 14 V1/V2 V1/V2 12 15 Y A 001aan374 001aai331 Fig 1. V1/V2 Logic symbol Fig 2. mna341 IEC logic symbol Fig 3. Logic diagram (one level shifter) 5. Pinning information 5.1 Pinning 74HC4049 VCC 1 16 n.c. 1Y 2 15 6Y 1A 3 14 6A 2Y 74HC4049 13 n.c.
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74HC4049 NXP Semiconductors Hex inverting HIGH-to-LOW level shifter 5.2 Pin description Table 2. Pin description Symbol Pin Description VCC 1 supply voltage 1Y to 6Y 2, 4, 6, 10, 12, 15 output 1A to 6A 3, 5, 7, 9, 11, 14 input GND 8 ground (0 V) n.c. 13, 16 not connected 6. Functional description Table 3. Function table [1] Input Output nA nY L H H L [1] H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state. 7. Limiting values Table 4.
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74HC4049 NXP Semiconductors Hex inverting HIGH-to-LOW level shifter 100 Ω input to logic circuit polysilicon resistor D1 GND 001aan375 Fig 6. Input protection for the 74HC4049 8. Recommended operating conditions Table 5. Recommended operating conditions Voltages are referenced to GND (ground = 0 V) Symbol Parameter Min Typ Max Unit VCC supply voltage Conditions 2.0 5.0 6.
PAGE 5
74HC4049 NXP Semiconductors Hex inverting HIGH-to-LOW level shifter Table 6. Static characteristics …continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Tamb = 25 C Conditions Min VOL II LOW-level output voltage input leakage current ICC supply current CI input capacitance Tamb = 40 C to +85 C Tamb = 40 C to Unit +125 C Typ Max Min Max Min Max VI = VIH or VIL IO = 20 A; VCC = 2.0 V - - 0.1 - 0.1 - 0.
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74HC4049 NXP Semiconductors Hex inverting HIGH-to-LOW level shifter Table 7. Dynamic characteristics …continued Voltages are referenced to GND (ground = 0 V); CL = 50 pF unless otherwise specified; for test circuit see Figure 8. Symbol Parameter CPD power dissipation capacitance Tamb = 25 C Conditions CL = 50 pF; f = 1 MHz; VI = GND to VCC Tamb = 40 C to +85 C Tamb = 40 C to +125 C Min Typ Max Min Max Min Max - 14 - - - - - [3] [1] tpd is the same as tPLH and tPHL.
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4HC4049 NXP Semiconductors Hex inverting HIGH-to-LOW level shifter VI negative pulse tW 90 % VM VM 10 % GND tr tf tr tf VI 90 % positive pulse GND VM VM 10 % tW VCC G VI VO DUT RT CL 001aah768 Test data is given in Table 9. Definitions test circuit: RT = Termination resistance should be equal to output impedance Zo of the pulse generator. CL = Load capacitance including jig and probe capacitance. RL = Load resistance. S1 = Test selection switch. Fig 8.
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74HC4049 NXP Semiconductors Hex inverting HIGH-to-LOW level shifter 12. Package outline DIP16: plastic dual in-line package; 16 leads (300 mil) SOT38-4 ME seating plane D A2 A A1 L c e Z w M b1 (e 1) b b2 MH 9 16 pin 1 index E 1 8 0 5 10 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 min. A2 max. b b1 b2 c D (1) E (1) e e1 L ME MH w Z (1) max. mm 4.2 0.51 3.2 1.73 1.30 0.53 0.38 1.25 0.85 0.36 0.23 19.
PAGE 9
74HC4049 NXP Semiconductors Hex inverting HIGH-to-LOW level shifter SO16: plastic small outline package; 16 leads; body width 3.9 mm SOT109-1 D E A X c y HE v M A Z 16 9 Q A2 A (A 3) A1 pin 1 index θ Lp 1 L 8 e 0 detail X w M bp 2.5 5 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y Z (1) mm 1.75 0.25 0.10 1.45 1.25 0.25 0.49 0.36 0.25 0.19 10.0 9.8 4.0 3.8 1.27 6.
PAGE 10
74HC4049 NXP Semiconductors Hex inverting HIGH-to-LOW level shifter SSOP16: plastic shrink small outline package; 16 leads; body width 5.3 mm D SOT338-1 E A X c y HE v M A Z 9 16 Q A2 A (A 3) A1 pin 1 index θ Lp L 8 1 detail X w M bp e 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y Z (1) θ mm 2 0.21 0.05 1.80 1.65 0.25 0.38 0.25 0.20 0.09 6.4 6.0 5.4 5.2 0.65 7.9 7.6 1.25 1.03 0.
PAGE 11
74HC4049 NXP Semiconductors Hex inverting HIGH-to-LOW level shifter TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm SOT403-1 E D A X c y HE v M A Z 9 16 Q (A 3) A2 A A1 pin 1 index θ Lp L 1 8 e detail X w M bp 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (2) e HE L Lp Q v w y Z (1) θ mm 1.1 0.15 0.05 0.95 0.80 0.25 0.30 0.19 0.2 0.1 5.1 4.9 4.5 4.3 0.65 6.6 6.2 1 0.
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74HC4049 NXP Semiconductors Hex inverting HIGH-to-LOW level shifter 13. Abbreviations Table 10. Abbreviations Acronym Description CMOS Complementary Metal Oxide Semiconductor DUT Device Under Test ESD ElectroStatic Discharge HBM Human Body Model MM Machine Model 14. Revision history Table 11. Revision history Document ID Release date Data sheet status Change notice Supersedes 74HC4049 v.6 20130108 Product data sheet - 74HC4049 v.5 - 74HC4049 v.4 Modifications: 74HC4049 v.
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74HC4049 NXP Semiconductors Hex inverting HIGH-to-LOW level shifter 15. Legal information 15.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification.
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74HC4049 NXP Semiconductors Hex inverting HIGH-to-LOW level shifter Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. Non-automotive qualified products — Unless this data sheet expressly states that this specific NXP Semiconductors product is automotive qualified, the product is not suitable for automotive use.
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74HC4049 NXP Semiconductors Hex inverting HIGH-to-LOW level shifter 17. Contents 1 2 3 4 5 5.1 5.2 6 7 8 9 10 11 12 13 14 15 15.1 15.2 15.3 15.4 16 17 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 1 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 2 Pinning . . . . . . . . . . . .