74HC4052; 74HCT4052 Dual 4-channel analog multiplexer/demultiplexer Rev. 10 — 19 July 2012 Product data sheet 1. General description The 74HC4052; 74HCT4052 is a high-speed Si-gate CMOS device and is pin compatible with the HEF4052B. The device is specified in compliance with JEDEC standard no. 7A. The 74HC4052; 74HCT4052 is a dual 4-channel analog multiplexer/demultiplexer with common select logic. Each multiplexer has four independent inputs/outputs (pins nY0 to nY3) and a common input/output (pin nZ).
74HC4052; 74HCT4052 NXP Semiconductors Dual 4-channel analog multiplexer/demultiplexer 3. Applications Analog multiplexing and demultiplexing Digital multiplexing and demultiplexing Signal gating 4. Ordering information Table 1.
74HC4052; 74HCT4052 NXP Semiconductors Dual 4-channel analog multiplexer/demultiplexer 5. Functional diagram 10 13 1Z 1Y0 12 10 S0 1Y1 14 9 S1 1Y2 15 6 E 1Y3 11 2Y0 1 2Y1 5 2Y2 2 2Y3 4 0 4× 9 1 6 G4 0 3 MDX 3 0 1 1 5 2 2 3 4 12 14 13 15 2Z 11 001aah824 3 Fig 1. 001aah825 Logic symbol Fig 2. IEC logic symbol nYn VCC VEE VCC VCC VCC VEE from logic VEE nZ mnb043 Fig 3.
74HC4052; 74HCT4052 NXP Semiconductors Dual 4-channel analog multiplexer/demultiplexer VDD 16 13 12 14 15 S0 10 11 S1 E 9 LOGIC LEVEL CONVERSION 1Y0 1Y1 1Y2 1Y3 1-OF-4 DECODER 1 2Y0 6 5 2 4 3 Fig 4. 1Z 8 7 VSS VEE 2Y1 2Y2 2Y3 2Z 001aah872 Functional diagram 74HC_HCT4052 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 10 — 19 July 2012 © NXP B.V. 2012. All rights reserved.
74HC4052; 74HCT4052 NXP Semiconductors Dual 4-channel analog multiplexer/demultiplexer 6. Pinning information 6.
74HC4052; 74HCT4052 NXP Semiconductors Dual 4-channel analog multiplexer/demultiplexer 7. Functional description 7.1 Function table Table 3. Function table[1] Input Channel on E S1 S0 L L L nY0 and nZ L L H nY1 and nZ L H L nY2 and nZ L H H nY3 and nZ H X X none [1] H = HIGH voltage level; L = LOW voltage level; X = don’t care. 8. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134).
4HC4052; 74HCT4052 NXP Semiconductors Dual 4-channel analog multiplexer/demultiplexer 9. Recommended operating conditions Table 5. Recommended operating conditions Symbol Parameter Conditions supply voltage VCC 74HC4052 74HCT4052 Unit Min Typ Max Min Typ Max VCC GND 2.0 5.0 10.0 4.5 5.0 5.5 V VCC VEE 2.0 5.0 10.0 2.0 5.0 10.
74HC4052; 74HCT4052 NXP Semiconductors Dual 4-channel analog multiplexer/demultiplexer 10. Static characteristics Table 6. RON resistance per switch for 74HC4052 and 74HCT4052 VI = VIH or VIL; for test circuit see Figure 9. Vis is the input voltage at a nYn or nZ terminal, whichever is assigned as an input. Vos is the output voltage at a nYn or nZ terminal, whichever is assigned as an output. For 74HC4052: VCC GND or VCC VEE = 2.0 V, 4.5 V, 6.0 V and 9.0 V. For 74HCT4052: VCC GND = 4.5 V and 5.
74HC4052; 74HCT4052 NXP Semiconductors Dual 4-channel analog multiplexer/demultiplexer Table 6. RON resistance per switch for 74HC4052 and 74HCT4052 …continued VI = VIH or VIL; for test circuit see Figure 9. Vis is the input voltage at a nYn or nZ terminal, whichever is assigned as an input. Vos is the output voltage at a nYn or nZ terminal, whichever is assigned as an output. For 74HC4052: VCC GND or VCC VEE = 2.0 V, 4.5 V, 6.0 V and 9.0 V. For 74HCT4052: VCC GND = 4.5 V and 5.5 V, VCC VEE = 2.
74HC4052; 74HCT4052 NXP Semiconductors Dual 4-channel analog multiplexer/demultiplexer Table 7. Static characteristics for 74HC4052 Voltages are referenced to GND (ground = 0 V). Vis is the input voltage at pins nYn or nZ, whichever is assigned as an input. Vos is the output voltage at pins nZ or nYn, whichever is assigned as an output. Symbol Parameter Tamb = 40 C to +85 VIH VIL II IS(OFF) Conditions Min Typ Max Unit VCC = 2.0 V 1.5 1.2 - V VCC = 4.5 V 3.15 2.4 - V VCC = 6.0 V 4.
74HC4052; 74HCT4052 NXP Semiconductors Dual 4-channel analog multiplexer/demultiplexer Table 7. Static characteristics for 74HC4052 …continued Voltages are referenced to GND (ground = 0 V). Vis is the input voltage at pins nYn or nZ, whichever is assigned as an input. Vos is the output voltage at pins nZ or nYn, whichever is assigned as an output. Symbol Parameter Conditions Min Typ Max Unit IS(OFF) OFF-state leakage current VCC = 10.
74HC4052; 74HCT4052 NXP Semiconductors Dual 4-channel analog multiplexer/demultiplexer Table 8. Static characteristics for 74HCT4052 …continued Voltages are referenced to GND (ground = 0 V). Vis is the input voltage at pins nYn or nZ, whichever is assigned as an input. Vos is the output voltage at pins nZ or nYn, whichever is assigned as an output. Symbol Parameter Conditions Min Typ Max Unit VIL LOW-level input voltage VCC = 4.5 V to 5.5 V - - 0.
74HC4052; 74HCT4052 NXP Semiconductors Dual 4-channel analog multiplexer/demultiplexer 11. Dynamic characteristics Table 9. Dynamic characteristics for 74HC4052 GND = 0 V; tr = tf = 6 ns; CL = 50 pF; for test circuit see Figure 15. Vis is the input voltage at a nYn or nZ terminal, whichever is assigned as an input. Vos is the output voltage at a nYn or nZ terminal, whichever is assigned as an output. Symbol Parameter Conditions Min Typ Max Unit VCC = 2.0 V; VEE = 0 V - 14 75 ns VCC = 4.
74HC4052; 74HCT4052 NXP Semiconductors Dual 4-channel analog multiplexer/demultiplexer Table 9. Dynamic characteristics for 74HC4052 …continued GND = 0 V; tr = tf = 6 ns; CL = 50 pF; for test circuit see Figure 15. Vis is the input voltage at a nYn or nZ terminal, whichever is assigned as an input. Vos is the output voltage at a nYn or nZ terminal, whichever is assigned as an output. Symbol toff Parameter turn-off time Conditions Min Typ Max Unit VCC = 2.0 V; VEE = 0 V - - 375 ns VCC = 4.
74HC4052; 74HCT4052 NXP Semiconductors Dual 4-channel analog multiplexer/demultiplexer Table 10. Dynamic characteristics for 74HCT4052 …continued GND = 0 V; tr = tf = 6 ns; CL = 50 pF; for test circuit see Figure 15. Vis is the input voltage at a nYn or nZ terminal, whichever is assigned as an input. Vos is the output voltage at a nYn or nZ terminal, whichever is assigned as an output.
74HC4052; 74HCT4052 NXP Semiconductors Dual 4-channel analog multiplexer/demultiplexer VI VM E, Sn inputs 0V tPZL tPLZ 50 % Vos output 10 % tPHZ tPZH 90 % 50 % Vos output switch ON switch ON switch OFF 001aae330 For 74HC4052: VM = 0.5 VCC. For 74HCT4052: VM = 1.3 V. Fig 14.
74HC4052; 74HCT4052 NXP Semiconductors Dual 4-channel analog multiplexer/demultiplexer Table 11. Test data Test Input VI Load Vis tr, tf S1 position CL RL at fmax other[1] tPHL, tPLH [2] pulse < 2 ns 6 ns 50 pF 1 k open tPZH, tPHZ [2] VCC < 2 ns 6 ns 50 pF 1 k VEE tPZL, tPLZ [2] VEE < 2 ns 6 ns 50 pF 1 k VCC [1] [2] tr = tf = 6 ns; when measuring fmax, there is no constraint to tr and tf with 50 % duty factor.
74HC4052; 74HCT4052 NXP Semiconductors Dual 4-channel analog multiplexer/demultiplexer VCC Sn 10 μF Vis nYn/nZ nZ/nYn VEE GND RL Vos CL dB 001aah829 Fig 16. Test circuit for measuring sine-wave distortion VCC Sn 0.1 μF Vis nYn/nZ nZ/nYn VEE GND RL Vos CL dB 001aah871 VCC = 4.5 V; GND = 0 V; VEE = 4.5 V; RL = 600 ; RS = 1 k. a. Test circuit 001aae332 0 αiso (dB) −20 −40 −60 −80 −100 10 102 103 104 105 106 fi (kHz) b.
74HC4052; 74HCT4052 NXP Semiconductors Dual 4-channel analog multiplexer/demultiplexer VCC Sn 0.1 μF Vis RL nYn/nZ nZ/nYn VEE GND RL CL VCC Sn nYn/nZ nZ/nYn VEE RL GND RL Vos CL dB 001aah873 Fig 18. Test circuits for measuring crosstalk between any two switches/multiplexers 2RL 2RL VCC Sn, E Vct nYn G 2RL nZ VEE GND 2RL oscilloscope 001aah913 Fig 19.
74HC4052; 74HCT4052 NXP Semiconductors Dual 4-channel analog multiplexer/demultiplexer VCC Sn 10 μF Vis nYn/nZ nZ/nYn VEE GND RL Vos CL dB 001aah829 VCC = 4.5 V; GND = 0 V; VEE = 4.5 V; RL = 50 ; RS = 1 k. a. Test circuit 001aad551 5 Vos (dB) 3 1 −1 −3 −5 10 102 103 104 105 106 f (kHz) b. Typical frequency response Fig 20. Test circuit for frequency response 74HC_HCT4052 Product data sheet All information provided in this document is subject to legal disclaimers. Rev.
74HC4052; 74HCT4052 NXP Semiconductors Dual 4-channel analog multiplexer/demultiplexer 13. Package outline SO16: plastic small outline package; 16 leads; body width 3.9 mm SOT109-1 D E A X c y HE v M A Z 16 9 Q A2 A (A 3) A1 pin 1 index θ Lp 1 L 8 e 0 detail X w M bp 2.5 5 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y Z (1) mm 1.75 0.25 0.10 1.45 1.25 0.25 0.49 0.
74HC4052; 74HCT4052 NXP Semiconductors Dual 4-channel analog multiplexer/demultiplexer SSOP16: plastic shrink small outline package; 16 leads; body width 5.3 mm D SOT338-1 E A X c y HE v M A Z 9 16 Q A2 A (A 3) A1 pin 1 index θ Lp L 8 1 detail X w M bp e 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y Z (1) θ mm 2 0.21 0.05 1.80 1.65 0.25 0.38 0.25 0.20 0.09 6.4 6.0 5.4 5.2 0.65 7.9 7.
74HC4052; 74HCT4052 NXP Semiconductors Dual 4-channel analog multiplexer/demultiplexer DIP16: plastic dual in-line package; 16 leads (300 mil) SOT38-4 ME seating plane D A2 A A1 L c e Z w M b1 (e 1) b b2 MH 9 16 pin 1 index E 1 8 0 5 10 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 min. A2 max. b b1 b2 c D (1) E (1) e e1 L ME MH w Z (1) max. mm 4.2 0.51 3.2 1.73 1.30 0.53 0.38 1.25 0.85 0.36 0.23 19.50 18.
74HC4052; 74HCT4052 NXP Semiconductors Dual 4-channel analog multiplexer/demultiplexer TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm SOT403-1 E D A X c y HE v M A Z 9 16 Q (A 3) A2 A A1 pin 1 index θ Lp L 1 8 e detail X w M bp 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (2) e HE L Lp Q v w y Z (1) θ mm 1.1 0.15 0.05 0.95 0.80 0.25 0.30 0.19 0.2 0.1 5.1 4.9 4.5 4.3 0.
74HC4052; 74HCT4052 NXP Semiconductors Dual 4-channel analog multiplexer/demultiplexer DHVQFN16: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; SOT763-1 16 terminals; body 2.5 x 3.5 x 0.85 mm A B D A A1 E c detail X terminal 1 index area terminal 1 index area C e1 e 2 7 y y1 C v M C A B w M C b L 1 8 Eh e 16 9 15 10 Dh X 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT mm A(1) max. A1 b 1 0.05 0.00 0.30 0.
74HC4052; 74HCT4052 NXP Semiconductors Dual 4-channel analog multiplexer/demultiplexer 14. Abbreviations Table 13. Abbreviations Acronym Description CMOS Complementary Metal Oxide Semiconductor DUT Device Under Test ESD ElectroStatic Discharge HBM Human Body Model MM Machine Model 15. Revision history Table 14. Revision history Document ID Release date Data sheet status Change notice Supersedes 74HC_HCT4052 v.10 20120719 Product data sheet - 74HC_HCT4052 v.9 - 74HC_HCT4052 v.
74HC4052; 74HCT4052 NXP Semiconductors Dual 4-channel analog multiplexer/demultiplexer 16. Legal information 16.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification.
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NXP Semiconductors 74HC4052; 74HCT4052 Dual 4-channel analog multiplexer/demultiplexer 18. Contents 1 2 3 4 5 6 6.1 6.2 7 7.1 8 9 10 11 12 13 14 15 16 16.1 16.2 16.3 16.4 17 18 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Functional diagram . . . . . . . . . . . . . . . . . . . . . .