74HC597; 74HCT597 8-bit shift register with input flip-flops Rev. 3 — 15 April 2014 Product data sheet 1. General description The 74HC597; 74HCT597 is an 8-bit shift register with input flip-flops. It consists of an 8-bit storage register feeding a parallel-in, serial-out 8-bit shift register. Both the storage register and the shift register have positive edge-triggered clocks. The shift register also has direct load (from storage) and clear inputs.
74HC597; 74HCT597 NXP Semiconductors 8-bit shift register with input flip-flops 4. Functional diagram 67&3 ' ' ' ' ' ' ' ' 05 '6 67&3 05 '6 ' ' ' ' ' ' ' ' ,1387 )/,3 )/236 %,7 6+,)7 5(*,67(5 3/ 4 ,1387 )/,3 )/236 6+&3 DDD Fig 1. 3/ 6+&3 4 DDD Functional diagram Fig 2.
74HC597; 74HCT597 NXP Semiconductors 8-bit shift register with input flip-flops 05 6+&3 3/ 67&3 '6 ' & 6 ' ' & ' 5 & 6 6 5 ' & ' 5 & 6 6 5 ' & ' 5 & 6 6 5 ' & ' 5 & 6 6 5 ' & ' 5 & 6 6 5 ' & ' 5 & 6 6 5 ' & ' 5 & 6 5 6 ' 4 & 5 DDD Fig 4. Logic diagram 74HC_HCT597 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 15 April 2014 © NXP Semiconductors N.V. 2014.
74HC597; 74HCT597 NXP Semiconductors 8-bit shift register with input flip-flops 5. Pinning information 5.1 Pinning +& +&7 ' 9&& ' ' ' '6 +& +&7 ' 9&& ' ' ' '6 67&3 ' 3/ 6+&3 ' 67&3 ' 6+&3 ' 05 *1' 3/ ' ' ' 05 ' *1' 4 4 DDD DDD Fig 5. Pin configuration DIP16 and SO16 Fig 6. Pin configuration SSOP16 and TSSOP16 5.
74HC597; 74HCT597 NXP Semiconductors 8-bit shift register with input flip-flops 6. Functional description Function table[1] Table 3.
74HC597; 74HCT597 NXP Semiconductors 8-bit shift register with input flip-flops 7. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter VCC supply voltage Conditions Min Max Unit 0.5 +7 V IIK input clamping current VI < 0.5 V or VI > VCC + 0.5 V - 20 mA IOK output clamping current VO < 0.5 V or VO > VCC + 0.5 V - 20 mA IO output current VO = 0.
4HC597; 74HCT597 NXP Semiconductors 8-bit shift register with input flip-flops 9. Static characteristics Table 6. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter 25 C Conditions Min Typ VCC = 2.0 V 1.5 VCC = 4.5 V VCC = 6.0 V 40 C to +85 C 40 C to +125 C Unit Max Min Max Min Max 1.2 - 1.5 - 1.5 - V 3.15 2.4 - 3.15 - 3.15 - V 4.2 3.2 - 4.2 - 4.
74HC597; 74HCT597 NXP Semiconductors 8-bit shift register with input flip-flops Table 6. Static characteristics …continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter 25 C Conditions Min Typ Max Min Max Min Max - - 8.0 - 80.0 - 160.0 A per input pin; DS input - 25 90 - 112.5 - 122.
74HC597; 74HCT597 NXP Semiconductors 8-bit shift register with input flip-flops Table 7. Dynamic characteristics …continued Voltages are referenced to GND (ground = 0 V); CL = 50 pF unless otherwise specified; for test circuit, see Figure 14. Symbol Parameter tt tW transition time pulse width 25 C Conditions Min Typ 40 C to +85 C 40 C to +125 C Unit Max Min Max Min Max [2] see Figure 10 VCC = 2.0 V - 19 75 - 95 - 110 ns VCC = 4.5 V - 7 15 - 19 - 22 ns VCC = 6.
74HC597; 74HCT597 NXP Semiconductors 8-bit shift register with input flip-flops Table 7. Dynamic characteristics …continued Voltages are referenced to GND (ground = 0 V); CL = 50 pF unless otherwise specified; for test circuit, see Figure 14. Symbol Parameter tsu set-up time 25 C Conditions 40 C to +85 C 40 C to +125 C Unit Min Typ Max Min Max Min Max VCC = 2.0 V 60 8 - 75 - 90 - ns VCC = 4.5 V 12 3 - 15 - 18 - ns VCC = 6.0 V 10 2 - 13 - 15 - ns VCC = 2.
74HC597; 74HCT597 NXP Semiconductors 8-bit shift register with input flip-flops Table 7. Dynamic characteristics …continued Voltages are referenced to GND (ground = 0 V); CL = 50 pF unless otherwise specified; for test circuit, see Figure 14.
74HC597; 74HCT597 NXP Semiconductors 8-bit shift register with input flip-flops Table 7. Dynamic characteristics …continued Voltages are referenced to GND (ground = 0 V); CL = 50 pF unless otherwise specified; for test circuit, see Figure 14.
74HC597; 74HCT597 NXP Semiconductors 8-bit shift register with input flip-flops 9, 90 05 LQSXW *1' W: W3+/ 92+ 4 RXWSXW 90 92/ DDD Measurement points are given in Table 8. VOL and VOH are typical voltage output levels that occur with the output load. Fig 9. input (MR) to (Q), output propagation delays and (MR) pulse width IPD[ 9, 90 3/ LQSXW *1' W: W3/+ W3+/ 92+ 4 RXWSXW 90 92/ W7+/ W7/+ DDD Measurement points are given in Table 8.
74HC597; 74HCT597 NXP Semiconductors 8-bit shift register with input flip-flops 9, SRVLWLYH '6 'Q LQSXW 90 *1' 9, QHJDWLYH '6 'Q LQSXW 90 *1' WVX WK 9, 90 6+&3 LQSXW *1' 9, 90 67&3 LQSXW *1' WVX WK DDD Measurement points are given in Table 8. Fig 12. Hold and set-up times for (DS), (Dn) inputs to (SHCP), (STCP) inputs 9, 3/ LQSXW 90 *1' 9, 90 6+&3 LQSXW *1' WVX WK DDD Measurement points are given in Table 8. Fig 13. Set-up times for (PL) input to (SHCP) input Table 8.
74HC597; 74HCT597 NXP Semiconductors 8-bit shift register with input flip-flops VI tW 90 % negative pulse VM 0V tf tr tr tf VI 90 % positive pulse 0V VM 10 % VM VM 10 % tW VCC VCC G VI VO RL S1 open DUT CL RT 001aad983 Test data is given in Table 9. Definitions test circuit: RT = Termination resistance should be equal to output impedance Zo of the pulse generator. CL = Load capacitance including jig and probe capacitance. RL = Load resistance. S1 = Test selection switch.
74HC597; 74HCT597 NXP Semiconductors 8-bit shift register with input flip-flops 12. Package outline DIP16: plastic dual in-line package; 16 leads (300 mil) SOT38-4 ME seating plane D A2 A A1 L c e Z w M b1 (e 1) b b2 MH 9 16 pin 1 index E 1 8 0 5 10 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 min. A2 max. b b1 b2 c D (1) E (1) e e1 L ME MH w Z (1) max. mm 4.2 0.51 3.2 1.73 1.30 0.53 0.38 1.25 0.85 0.36 0.
74HC597; 74HCT597 NXP Semiconductors 8-bit shift register with input flip-flops SO16: plastic small outline package; 16 leads; body width 3.9 mm SOT109-1 D E A X c y HE v M A Z 16 9 Q A2 A (A 3) A1 pin 1 index θ Lp 1 L 8 e 0 detail X w M bp 2.5 5 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y Z (1) mm 1.75 0.25 0.10 1.45 1.25 0.25 0.49 0.36 0.25 0.19 10.0 9.8 4.0 3.
74HC597; 74HCT597 NXP Semiconductors 8-bit shift register with input flip-flops SSOP16: plastic shrink small outline package; 16 leads; body width 5.3 mm D SOT338-1 E A X c y HE v M A Z 9 16 Q A2 A (A 3) A1 pin 1 index θ Lp L 8 1 detail X w M bp e 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y Z (1) θ mm 2 0.21 0.05 1.80 1.65 0.25 0.38 0.25 0.20 0.09 6.4 6.0 5.4 5.2 0.65 7.9 7.6 1.
74HC597; 74HCT597 NXP Semiconductors 8-bit shift register with input flip-flops TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm SOT403-1 E D A X c y HE v M A Z 9 16 Q (A 3) A2 A A1 pin 1 index θ Lp L 1 8 e detail X w M bp 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (2) e HE L Lp Q v w y Z (1) θ mm 1.1 0.15 0.05 0.95 0.80 0.25 0.30 0.19 0.2 0.1 5.1 4.9 4.5 4.3 0.65 6.
74HC597; 74HCT597 NXP Semiconductors 8-bit shift register with input flip-flops 13. Abbreviations Table 10. Abbreviations Acronym Description CMOS Complementary Metal Oxide Semiconductor DUT Device Under Test ESD ElectroStatic Discharge HBM Human Body Model MM Machine Model TTL Transistor-Transistor Logic 14. Revision history Table 11. Revision history Document ID Release date Data sheet status Change notice Supersedes 74HC_HCT597 v.
74HC597; 74HCT597 NXP Semiconductors 8-bit shift register with input flip-flops 15. Legal information 15.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification.
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NXP Semiconductors 74HC597; 74HCT597 8-bit shift register with input flip-flops 17. Contents 1 2 3 4 5 5.1 5.2 6 7 8 9 10 11 12 13 14 15 15.1 15.2 15.3 15.4 16 17 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 1 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 4 Pinning . . . . . .