Datasheet

December 1990 3
Philips Semiconductors Product specification
Triple 3-input NAND gate 74HC/HCT10
PIN DESCRIPTION
PIN NO. SYMBOL NAME AND FUNCTION
1, 3, 9 1A to 3A data inputs
2, 4, 10 1B to 3B data inputs
13, 5, 11 1C to 3C data inputs
12, 6, 8 1Y to 3Y data outputs
7 GND ground (0 V)
14 V
CC
positive supply voltage
Fig.1 Pin configuration. Fig.2 Logic symbol.
Fig.3 IEC logic symbol.
Fig.4 Functional diagram. Fig.5 Logic diagram (one gate).
FUNCTION TABLE
Notes
1. H = HIGH voltage level
L = LOW voltage level
INPUTS OUTPUT
nA nB nC nY
LLL H
LLH H
LHL H
LHH H
HLL H
HLH H
HHL H
HHH L