74HC132; 74HCT132 Quad 2-input NAND Schmitt trigger Rev. 3 — 30 August 2012 Product data sheet 1. General description The 74HC132; 74HCT132 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard No. 7A The 74HC132; 74HCT132 is a quad 2-input NAND gate with Schmitt trigger inputs. This device features reduced input threshold levels to allow interfacing to TTL logic levels.
74HC132; 74HCT132 NXP Semiconductors Quad 2-input NAND Schmitt trigger 4. Ordering information Table 1. Ordering information Type number 74HC132N Package Temperature range Name Description Version 40 C to +125 C DIP14 plastic dual in-line package; 14 leads (300 mil) SOT27-1 40 C to +125 C SO14 plastic small outline package; 14 leads; body width 3.9 mm SOT108-1 40 C to +125 C SSOP14 plastic shrink small outline package; 14 leads; body width 5.
74HC132; 74HCT132 NXP Semiconductors Quad 2-input NAND Schmitt trigger 6. Pinning information 6.1 Pinning 1A 1 14 VCC 1B 2 13 4B 1Y 3 2A 4 2B 5 10 3B 2Y 6 9 3A GND 7 8 3Y 12 4A 132 11 4Y mna406 Fig 4. Pin configuration DIP14, SO14 and (T)SSOP14 6.2 Pin description Table 2. Pin description Symbol Pin Description 1A to 4A 1, 4, 9, 12 data input 1B to 4B 2, 5, 10, 13 data input 1Y to 4Y 3, 6, 8, 11 data output GND 7 ground (0 V) VCC 14 supply voltage 7.
74HC132; 74HCT132 NXP Semiconductors Quad 2-input NAND Schmitt trigger 8. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter VCC supply voltage Conditions Min Max Unit 0.5 +7 V - 20 mA - 20 mA - 25 mA 50 mA IIK input clamping current VI < 0.5 V or VI > VCC + 0.5 V [1] IOK output clamping current VO < 0.5 V or VO > VCC + 0.
74HC132; 74HCT132 NXP Semiconductors Quad 2-input NAND Schmitt trigger 10. Static characteristics Table 6. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter 25 C Conditions Min Typ IO = 20 A; VCC = 2.0 V 1.9 IO = 20 A; VCC = 4.5 V 4.4 40 C to +85 C 40 C to +125 C Unit Max Min Max Min Max 2.0 - 1.9 - 1.9 - V 4.5 - 4.4 - 4.
74HC132; 74HCT132 NXP Semiconductors Quad 2-input NAND Schmitt trigger 11. Dynamic characteristics Table 7. Dynamic characteristics GND = 0 V; CL = 50 pF; for load circuit see Figure 6. Symbol Parameter 25 C Conditions 40 C to +125 C Unit Min Typ Max Max (85 C) Max (125 C) - 36 125 155 190 VCC = 4.5 V - 13 25 31 38 ns VCC = 5.0 V; CL = 15 pF - 11 - - - ns - 10 21 26 32 ns VCC = 2.0 V - 19 75 95 110 ns VCC = 4.
4HC132; 74HCT132 NXP Semiconductors Quad 2-input NAND Schmitt trigger 12. Waveforms VI nA, nB input VM GND tPHL VOH tPLH VY VM VX nY output VOL tTHL tTLH 001aai814 Measurement points are given in Table 8. VOL and VOH are typical voltage output levels that occur with the output load. Fig 5. Input to output propagation delays Table 8. Measurement points Type Input Output VM VM VX VY 74HC132 0.5VCC 0.5VCC 0.1VCC 0.9VCC 74HCT132 1.3 V 1.3 V 0.1VCC 0.
74HC132; 74HCT132 NXP Semiconductors Quad 2-input NAND Schmitt trigger Table 9. Test data Type Input Load Test VI tr, tf CL 74HC132 VCC 6.0 ns 15 pF, 50 pF tPLH, tPHL 74HCT132 3.0 V 6.0 ns 15 pF, 50 pF tPLH, tPHL 13. Transfer characteristics Table 10. Transfer characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V); see Figure 7 and Figure 8.
74HC132; 74HCT132 NXP Semiconductors Quad 2-input NAND Schmitt trigger DDD DDD ,&& $ ,&& $ 9,1 9 a. VCC = 2.0 V 9,1 9 b. VCC = 4.5 V DDD ,&& P$ 9,1 9 c. VCC = 6.0 V Fig 9. Typical 74HC132 transfer characteristics 74HC_HCT132 Product data sheet All information provided in this document is subject to legal disclaimers. Rev.
74HC132; 74HCT132 NXP Semiconductors Quad 2-input NAND Schmitt trigger DDD DDD ,&& P$ ,&& P$ 9,1 9 a. VCC = 4.5 V 9,1 9 b. VCC = 5.5 V Fig 10. Typical 74HCT132 transfer characteristics 15.
74HC132; 74HCT132 NXP Semiconductors Quad 2-input NAND Schmitt trigger DDD DYHUDJH ,&& $ SRVLWLYH JRLQJ HGJH QHJDWLYH JRLQJ HGJH 9&& 9 (1) Positive-going edge. (2) Negative-going edge. Fig 11. Average additional supply current as a function of VCC for 74HC132; linear change of VI between 0.1VCC to 0.9VCC. DDD DYHUDJH ,&& $ SRVLWLYH JRLQJ HGJH QHJDWLYH JRLQJ HGJH 9&& 9 (1) Positive-going edge.
74HC132; 74HCT132 NXP Semiconductors Quad 2-input NAND Schmitt trigger VCC R VCC A Y B C 001aac440 For 74HC132 and 74HCT132: 1 1 f = --- -----------------T K RC For K-factor, see Figure 14 Fig 13. Relaxation oscillator DDD . DDD . 9&& 9 K-factor for 74HC132 9&& 9 K-factor for 74HCT132 Fig 14.
74HC132; 74HCT132 NXP Semiconductors Quad 2-input NAND Schmitt trigger 16. Package outline DIP14: plastic dual in-line package; 14 leads (300 mil) SOT27-1 ME seating plane D A2 A A1 L c e Z w M b1 (e 1) b MH 8 14 pin 1 index E 1 7 0 5 10 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 min. A2 max. b b1 c D (1) E (1) e e1 L ME MH w Z (1) max. mm 4.2 0.51 3.2 1.73 1.13 0.53 0.38 0.36 0.23 19.50 18.55 6.48 6.
74HC132; 74HCT132 NXP Semiconductors Quad 2-input NAND Schmitt trigger SO14: plastic small outline package; 14 leads; body width 3.9 mm SOT108-1 D E A X c y HE v M A Z 8 14 Q A2 A (A 3) A1 pin 1 index θ Lp 1 L 7 e detail X w M bp 0 2.5 5 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y Z (1) mm 1.75 0.25 0.10 1.45 1.25 0.25 0.49 0.36 0.25 0.19 8.75 8.55 4.0 3.8 1.
74HC132; 74HCT132 NXP Semiconductors Quad 2-input NAND Schmitt trigger SSOP14: plastic shrink small outline package; 14 leads; body width 5.3 mm D SOT337-1 E A X c y HE v M A Z 8 14 Q A2 A (A 3) A1 pin 1 index θ Lp L 7 1 detail X w M bp e 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y Z (1) θ mm 2 0.21 0.05 1.80 1.65 0.25 0.38 0.25 0.20 0.09 6.4 6.0 5.4 5.2 0.65 7.9 7.6 1.25 1.03 0.
74HC132; 74HCT132 NXP Semiconductors Quad 2-input NAND Schmitt trigger TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4.4 mm SOT402-1 E D A X c y HE v M A Z 8 14 Q (A 3) A2 A A1 pin 1 index θ Lp L 1 7 e detail X w M bp 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (2) e HE L Lp Q v w y Z (1) θ mm 1.1 0.15 0.05 0.95 0.80 0.25 0.30 0.19 0.2 0.1 5.1 4.9 4.5 4.3 0.65 6.6 6.
74HC132; 74HCT132 NXP Semiconductors Quad 2-input NAND Schmitt trigger 17. Abbreviations Table 11. Abbreviations Acronym Description CMOS Complementary Metal-Oxide Semiconductor DUT Device Under Test ESD ElectroStatic Discharge HBM Human Body Model LSTTL Low-power Schottky Transistor-Transistor Logic MM Machine Model TTL Transistor-Transistor Logic 18. Revision history Table 12. Revision history Document ID Release date Data sheet status Change notice Supersedes 74HC_HCT132 v.
74HC132; 74HCT132 NXP Semiconductors Quad 2-input NAND Schmitt trigger 19. Legal information 19.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification.
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NXP Semiconductors 74HC132; 74HCT132 Quad 2-input NAND Schmitt trigger 21. Contents 1 2 3 4 5 6 6.1 6.2 7 8 9 10 11 12 13 14 15 16 17 18 19 19.1 19.2 19.3 19.4 20 21 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Functional diagram . . . . . . . . . . . . . . . . . . . . . .