Datasheet

74HC_HCT166 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 3 — 11 September 2013 10 of 21
NXP Semiconductors
74HC166; 74HCT166
8-bit parallel-in/serial out shift register
t
h
hold time Dn, CE to CP; see Figure 9
V
CC
= 2.0 V 2 8- 2 - 2 -ns
V
CC
= 4.5 V 2 3- 2 - 2 -ns
V
CC
= 6.0 V 2 2- 2 - 2 -ns
PE
to CP; see Figure 9
V
CC
= 2.0 V 0 28 - 0 - 0 - ns
V
CC
= 4.5 V 0 10 - 0 - 0 - ns
V
CC
= 6.0 V 0 8- 0 - 0 - ns
f
max
maximum
frequency
CP input; see Figure 7
V
CC
= 2.0 V 6 19 - 4.8 - 4 - MHz
V
CC
= 4.5 V 30 57 - 24 - 20 - MHz
V
CC
= 5.0 V; C
L
=15pF - 63 - - - - - MHz
V
CC
= 6.0 V 35 68 - 28 - 24 - MHz
C
PD
power
dissipation
capacitance
per package;
V
I
=GNDtoV
CC
[3]
-41- - - - - pF
74HCT166
t
pd
propagation
delay
CP to Q7; see Figure 7
[1]
V
CC
= 4.5 V - 23 40 - 50 - 60 ns
V
CC
= 5.0 V; C
L
=15pF - 20 - - - - - ns
MR
to Q7; see Figure 8
V
CC
= 4.5 V - 22 40 - 50 - 60 ns
V
CC
= 5.0 V; C
L
=15pF - 19 - - - - - ns
t
t
transition
time
output; see Figure 7
[2]
V
CC
= 4.5 V - 7 15 - 19 - 22 ns
t
W
pulse width CP input HIGH or LOW;
see Figure 7
V
CC
= 4.5 V 20 9 - 25 - 30 - ns
MR
input LOW; see Figure 8
V
CC
= 4.5 V 25 11 - 31 - 38 - ns
t
rec
recovery time MR to CP; see Figure 8
V
CC
= 4.5 V 0 7- 0 - 0 -ns
t
su
set-up time Dn, CE to CP; see Figure 9
V
CC
= 4.5 V 16 8 - 20 - 24 - ns
PE
to CP; see Figure 9
V
CC
= 4.5 V 30 15 - 38 - 45 - ns
t
h
hold time Dn, CE to CP; see Figure 9
V
CC
= 4.5 V 0 3- 0 - 0 -ns
PE
to CP; see Figure 9
V
CC
= 4.5 V 0 13 - 0 - 0 - ns
Table 7. Dynamic characteristics
…continued
GND (ground = 0 V); t
r
= t
f
= 6 ns: C
L
= 50 pF unless otherwise specified; for test circuit, see Figure 10
Symbol Parameter Conditions 25 C 40 C to +85 C 40 C to +125 C Unit
Min Typ Max Min Max Min Max