Datasheet

74HC_HCT175 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 4 — 8 April 2014 7 of 19
NXP Semiconductors
74HC175; 74HCT175
Quad D-type flip-flop with reset; positive-edge trigger
10. Dynamic characteristics
Table 7. Dynamic characteristics
GND (ground = 0 V); C
L
= 50 pF unless otherwise specified; for test circuit, see Figure 11
Symbol Parameter Conditions 25 C 40 C to +85 C 40 C to +125 C Unit
Min Typ Max Min Max Min Max
74HC175
t
pd
propagation
delay
CP to Qn, Qn;
see Figure 8
[1]
V
CC
= 2.0 V - 55 175 - 220 - 265 ns
V
CC
= 4.5 V - 20 35 - 44 - 53 ns
V
CC
=5V; C
L
=15pF-17---- - ns
V
CC
= 6.0 V - 16 30 - 37 - 45 ns
t
PHL
HIGH to LOW
propagation
delay
MR to Qn, Qn;
see Figure 10
V
CC
= 2.0 V - 50 150 - 190 - 225 ns
V
CC
= 4.5 V - 18 30 - 38 - 45 ns
V
CC
=5V; C
L
=15pF-15---- - ns
V
CC
= 6.0 V - 14 26 - 33 - 38 ns
t
t
transition time Qn output; see Figure 8
[2]
V
CC
= 2.0 V - 19 75 - 95 - 110 ns
V
CC
= 4.5 V - 7 15 - 19 - 22 ns
V
CC
= 6.0 V - 6 13 - 16 - 19 ns
t
W
pulse width CP input HIGH or LOW;
see Figure 8
V
CC
= 2.0 V 80 22 - 100 - 120 - ns
V
CC
= 4.5 V 16 8 - 20 - 24 - ns
V
CC
= 6.0 V 14 6 - 17 - 20 - ns
MR
input LOW;
see Figure 10
V
CC
= 2.0 V 80 19 - 100 - 120 - ns
V
CC
= 4.5 V 16 7 - 20 - 24 - ns
V
CC
= 6.0 V 14 6 - 17 - 20 - ns
t
rec
recovery time MR to CP; see Figure 10
V
CC
= 2.0 V 5 33 - 5 - 5 - ns
V
CC
= 4.5 V 5 12 - 5 - 5 - ns
V
CC
= 6.0 V 5 10 - 5 - 5 - ns
t
su
set-up time Dn to CP; see Figure 8
V
CC
= 2.0 V 80 3 - 100 - 120 - ns
V
CC
= 4.5 V 16 1 - 20 - 24 - ns
V
CC
= 6.0 V 14 1 - 17 - 20 - ns