Datasheet

74HC_HCT259 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 5 — 7 August 2012 8 of 22
NXP Semiconductors
74HC259; 74HCT259
8-bit addressable latch
10. Dynamic characteristics
Table 8. Dynamic characteristics
Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 12.
Symbol Parameter Conditions 25 C 40 C to +85 C 40 C to +125 C Unit
Min Typ
[1]
Max Min Max Min Max
74HC259
t
pd
propagation
delay
D to Qn; see Figure 6
[2]
V
CC
= 2.0 V - 58 185 - 230 - 280 ns
V
CC
= 4.5 V - 21 37 - 46 - 56 ns
V
CC
= 5.0 V; C
L
=15pF - 18 - - - - - ns
V
CC
= 6.0 V - 17 31 - 39 - 48 ns
An to Qn; see Figure 7
[2]
V
CC
= 2.0 V - 58 185 - 230 - 280 ns
V
CC
= 4.5 V - 21 37 - 46 - 56 ns
V
CC
= 5.0 V; C
L
=15pF - 17 - - - - - ns
V
CC
= 6.0 V - 17 31 - 39 - 48 ns
LE
to Qn; see Figure 8
[2]
V
CC
= 2.0 V - 55 170 - 215 - 255 ns
V
CC
= 4.5 V - 20 34 - 43 - 51 ns
V
CC
= 5.0 V; C
L
=15pF - 17 - - - - - ns
V
CC
= 6.0 V - 16 29 - 37 - 43 ns
t
PHL
HIGH to LOW
propagation
delay
MR to Qn; see Figure 9
V
CC
= 2.0 V - 50 155 - 195 - 235 ns
V
CC
= 4.5 V - 18 31 - 39 - 47 ns
V
CC
= 5.0 V; C
L
=15pF - 15 - - - - - ns
V
CC
= 6.0 V - 14 26 - 33 - 40 ns
t
t
transition time see Figure 8
[3]
V
CC
= 2.0 V - 19 75 - 95 - 119 ns
V
CC
= 4.5 V - 7 15 - 19 - 22 ns
V
CC
= 6.0 V - 6 13 - 16 - 19 ns
t
W
pulse width LE HIGH or LOW;
see Figure 8
V
CC
= 2.0 V 70 17 - 90 - 105 - ns
V
CC
= 4.5 V 14 6 - 18 - 21 - ns
V
CC
= 6.0 V 12 5 - 15 - 18 - ns
MR
LOW; see Figure 9
V
CC
= 2.0 V 70 17 - 90 - 105 - ns
V
CC
= 4.5 V 14 6 - 18 - 21 - ns
V
CC
= 6.0 V 12 5 - 15 - 18 - ns