Datasheet

74HC_HCT30 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 6 — 27 December 2012 3 of 16
NXP Semiconductors
74HC30; 74HCT30
8-input NAND gate
5. Pinning information
5.1 Pinning
5.2 Pin description
Fig 4. Pin configuration DIP14, SO14 and (T)SSOP14
74HC30
74HCT30
AV
CC
B n.c.
CH
DG
E n.c.
F n.c.
GND Y
001aal790
1
2
3
4
5
6
7
8
10
9
12
11
14
13
Table 2. Pin description
Symbol Pin Description
A 1 data input
B 2 data input
C 3 data input
D 4 data input
E 5 data input
F 6 data input
GND 7 ground (0 V)
Y 8 data output
n.c. 9 not connected
n.c. 10 not connected
G 11 data input
H 12 data input
n.c. 13 not connected
V
CC
14 supply voltage