Datasheet

74HC_HCT3G06 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 4 — 19 December 2013 6 of 14
NXP Semiconductors 74HC3G06; 74HCT3G06
Triple inverter with open-drain outputs
[1] C
PD
is used to determine the dynamic power dissipation (P
D
in W).
P
D
= C
PD
 V
CC
2
 f
i
 N + (C
L
 V
CC
2
 f
o
) where:
f
i
= input frequency in MHz;
f
o
= output frequency in MHz;
C
L
= output load capacitance in pF;
V
CC
= supply voltage in V;
N = number of inputs switching;
(C
L
 V
CC
2
 f
o
) = sum of outputs.
12. Waveforms
74HCT3G06
t
PZL
OFF-state to LOW
propagation delay
nA to nY; see Figure 6
V
CC
= 4.5 V - 9 24 - 29 ns
t
PLZ
LOW to OFF-state
propagation delay
nA to nY; see Figure 6
V
CC
= 4.5 V - 12 27 - 32 ns
t
THL
HIGH to LOW output
transition time
V
CC
= 4.5 V; see Figure 6 -619- 22ns
C
PD
power dissipation
capacitance
V
I
=GNDtoV
CC
 1.5 V
[1]
-4 - -pF
Table 8. Dynamic characteristics
…continued
Voltages are referenced to GND (ground = 0 V); all typical values are measured at T
amb
=25  C; for test circuit see Figure 7.
Symbol Parameter Conditions 40 C to +85 C 40 C to +125 C Unit
Min Typ Max Min Max
Measurement points are given in Table 9.
V
OL
is the typical output voltage level that occurs with the output load.
Fig 6. The input (nA) to output (nY) propagation delays
001aak031
nA input
GND
nY output
V
M
t
PLZ
t
PZL
t
THL
V
X
V
M
V
OL
V
CC
V
I
Table 9. Measurement points
Type Input Output
V
M
V
M
V
X
74HC3G06 0.5  V
CC
0.5  V
CC
0.1  V
CC
74HCT3G06 1.3 V 1.3 V 0.1  V
CC