Datasheet

ManualsBrandsNXP SEMICONDUCTORS ManualsLogic ICsLogic IC - Counter Counter, Tenth 74HCT Positive, Negtive 67 MHz SO 16

1. General description

The 74HC4017; 74HCT4017 is a 5-stage Johnson decade counter with 10 decoded

outputs (Q0 to Q9), an output from the most significant flip-flop (Q

5-9), two clock inputs

(CP0 and CP

1) and an overriding asynchronous master reset input (MR). The counter is

advanced by either a LOW-to-HIGH transition at CP0 while CP

1 is LOW or a

HIGH-to-LOW transition at CP

1 while CP0 is HIGH. When cascading counters, the Q5-9

output, which is LOW while the counter is in states 5, 6, 7, 8 and 9, can be used to drive

the CP0 input of the next counter. A HIGH on MR resets the counter to zero (Q0 = Q

5-9 =

HIGH; Q1 to Q9 = LOW) independent of the clock inputs (CP0 and CP

1). Automatic code

correction of the counter is provided by an internal circuit: following any illegal code the

counter returns to a proper counting mode within 11 clock pulses. Inputs include clamp

diodes. This enables the use of current limiting resistors to interface inputs to voltages in

excess of V

2. Features and benefits

 Wide supply voltage range from 2.0 V to 6.0 V

 Input levels:

 For 74HC4017: CMOS level

 For 74HCT4017: TTL level

 Complies with JEDEC standard no. 7 A

 ESD protection:

 HBM JESD22-A114E exceeds 2000 V

 MM JESD22-A115-A exceeds 200 V

 Multiple package options

 Specified from 40 Cto+85C and from 40 Cto+125C

74HC4017; 74HCT4017

Johnson decade counter with 10 decoded outputs

Rev. 4 — 10 December 2013 Product data sheet

Summary of content (24 pages)

PAGE 1
74HC4017; 74HCT4017 Johnson decade counter with 10 decoded outputs Rev. 4 — 10 December 2013 Product data sheet 1. General description The 74HC4017; 74HCT4017 is a 5-stage Johnson decade counter with 10 decoded outputs (Q0 to Q9), an output from the most significant flip-flop (Q5-9), two clock inputs (CP0 and CP1) and an overriding asynchronous master reset input (MR). The counter is advanced by either a LOW-to-HIGH transition at CP0 while CP1 is LOW or a HIGH-to-LOW transition at CP1 while CP0 is HIGH.
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74HC4017; 74HCT4017 NXP Semiconductors Johnson decade counter with 10 decoded outputs 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74HC4017 74HC4017N 40 C to +125 C DIP16 plastic dual in-line package; 16 leads (300 mil) SOT38-4 74HC4017D 40 C to +125 C SO16 plastic small outline package; 16 leads; body width 3.
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74HC4017; 74HCT4017 NXP Semiconductors Johnson decade counter with 10 decoded outputs CTRDIV10/DEC 14 13 14 15 0 Q0 3 Q1 2 Q2 4 Q3 7 3 Q4 10 4 Q5 1 5 Q6 5 6 Q7 6 7 Q8 9 8 Q9 11 9 Q5-9 12 CT≥5 CP1 CP0 MR & 13 15 1 001aah239 Fig 2. Fig 3.
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74HC4017; 74HCT4017 NXP Semiconductors Johnson decade counter with 10 decoded outputs CP0 INPUT CP1 INPUT MR INPUT Q0 OUTPUT Q1 OUTPUT Q2 OUTPUT Q3 OUTPUT Q4 OUTPUT Q5 OUTPUT Q6 OUTPUT Q7 OUTPUT Q8 OUTPUT Q9 OUTPUT Q5-9 OUTPUT Fig 5. 001aah244 Timing diagram 74HC_HCT4017 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 — 10 December 2013 © NXP B.V. 2013. All rights reserved.
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74HC4017; 74HCT4017 NXP Semiconductors Johnson decade counter with 10 decoded outputs 5. Pinning information 5.1 Pinning terminal 1 index area 1 74HC4017 74HCT4017 2 15 MR Q0 3 14 CP0 2 15 MR Q0 3 14 CP0 Q2 4 13 CP1 Q6 5 12 Q5-9 Q2 4 13 CP1 Q6 5 12 Q5-9 Q7 6 Q3 7 Q7 6 11 Q9 Q3 7 10 Q4 GND 8 9 Q8 GND(1) 11 Q9 10 Q4 9 Q1 Q1 Q8 16 VCC 8 1 GND Q5 16 VCC Q5 74HC4017 74HCT4017 001aah241 Transparent top view 001aah238 (1) This is not a supply pin.
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74HC4017; 74HCT4017 NXP Semiconductors Johnson decade counter with 10 decoded outputs 6. Functional description Table 3. Function table[1] MR CP0 CP1 Operation H X X Q0 = Q5-9 = HIGH; Q1 to Q9 = LOW L H  counter advances L  L counter advances L L X no change L X H no change L H  no change L  L no change [1] H = HIGH voltage level; L = LOW voltage level; X = don’t care;  = LOW-to-HIGH transition;  = HIGH-to-LOW transition; 7. Limiting values Table 4.
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4HC4017; 74HCT4017 NXP Semiconductors Johnson decade counter with 10 decoded outputs 8. Recommended operating conditions Table 5. Recommended operating conditions Symbol Parameter Conditions Min Typ Max Unit 74HC4017 VCC supply voltage 2.0 5.0 6.0 V VI input voltage 0 - VCC V VO output voltage 0 - VCC V t/V input transition rise and fall rate VCC = 2.0 V - - 625 ns/V VCC = 4.5 V - 1.67 139 ns/V - - 83 ns/V ambient temperature VCC = 6.
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74HC4017; 74HCT4017 NXP Semiconductors Johnson decade counter with 10 decoded outputs Table 6. Static characteristics …continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter VOL 25 C Conditions 40 C to +85 C 40 C to +125 C Unit Min Typ Max Min Max Min Max LOW-level VI = VIH or VIL output voltage IO = 20 A; VCC = 2.0 V - 0 0.1 - 0.1 - 0.1 V IO = 20 A; VCC = 4.5 V - 0 0.1 - 0.1 - 0.1 V IO = 20 A; VCC = 6.
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74HC4017; 74HCT4017 NXP Semiconductors Johnson decade counter with 10 decoded outputs 10. Dynamic characteristics Table 7. Dynamic characteristics GND = 0 V; tr = tf = 6 ns; CL = 50 pF; see Figure 11. Symbol Parameter 25 C Conditions 40 C to +85 C 40 C to +125 C Unit Min Typ Max Min Max Min Max - 63 230 - 290 - 345 ns 74HC4017 tpd propagation delay CP0 to Qn; CP0 to Q5-9; see Figure 10 [1] VCC = 2.0 V VCC = 4.5 V - 23 46 - 58 - 69 ns VCC = 5.
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74HC4017; 74HCT4017 NXP Semiconductors Johnson decade counter with 10 decoded outputs Table 7. Dynamic characteristics …continued GND = 0 V; tr = tf = 6 ns; CL = 50 pF; see Figure 11. Symbol Parameter tsu th trec fmax set-up time hold time recovery time maximum frequency 25 C Conditions Min Typ Max Min Max Min Max VCC = 2.0 V 50 8 - 65 - 75 - ns VCC = 4.5 V 10 3 - 13 - 15 - ns VCC = 6.0 V 9 2 - 11 - 13 - ns VCC = 2.0 V 50 17 - 65 - 75 - ns VCC = 4.
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74HC4017; 74HCT4017 NXP Semiconductors Johnson decade counter with 10 decoded outputs Table 7. Dynamic characteristics …continued GND = 0 V; tr = tf = 6 ns; CL = 50 pF; see Figure 11. Symbol Parameter 25 C Conditions 40 C to +85 C 40 C to +125 C Unit Min Typ Max Min Max Min Max - 7 15 - 19 - 22 ns 16 7 - 20 - 24 - ns 16 4 - 20 - 24 - ns 10 3 - 13 - 15 - ns 10 6 - 13 - 15 - ns 5 5 - 5 - 5 - ns VCC = 4.
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74HC4017; 74HCT4017 NXP Semiconductors Johnson decade counter with 10 decoded outputs 11. Waveforms VI CP0 input VM GND tsu th tsu th VI CP1 input VM GND 001aah245 Measurement points are given in Table 8. VOL and VOH are typical voltage output levels that occur with the output load. Fig 8.
PAGE 13
74HC4017; 74HCT4017 NXP Semiconductors Johnson decade counter with 10 decoded outputs VI CP0 input VM GND VI CP1 input VM GND tPHL tPLH VOH Q1 - Q9 output VM VOL tPLH tPHL VOH Q0, Q5 - Q9 output VOL VM tTLH tTHL 001aah247 Measurement points are given in Table 8. VOL and VOH are typical voltage output levels that occur with the output load. Conditions: CP1 = LOW while CP0 is triggered on a LOW-to-HIGH transition and CP0 = HIGH, while CP1 is triggered on a HIGH-to-LOW transition. Fig 10.
PAGE 14
74HC4017; 74HCT4017 NXP Semiconductors Johnson decade counter with 10 decoded outputs VI tW 90 % negative pulse VM 0V tf tr tr tf VI 90 % positive pulse 0V VM 10 % VM VM 10 % tW VCC VCC VI G VO RL S1 open DUT CL RT 001aad983 Test data is given in Table 9. Definitions test circuit: RT = Termination resistance should be equal to output impedance Zo of the pulse generator. CL = Load capacitance including jig and probe capacitance. RL = Load resistance. S1 = Test selection switch.
PAGE 15
74HC4017; 74HCT4017 NXP Semiconductors Johnson decade counter with 10 decoded outputs CP0 MR CP0 74HC4017 74HCT4017 CP1 Q0 Q1- - - - Q8 Q9 clock MR CP0 74HC4017 74HCT4017 MR 74HC4017 74HCT4017 CP1 Q0 Q1- - - - Q8 Q9 CP1 Q1 - - - - - - Q8 Q9 9 decoded outputs 8 decoded outputs 8 decoded outputs first stage intermediate stages last stage 001aah248 Fig 12.
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74HC4017; 74HCT4017 NXP Semiconductors Johnson decade counter with 10 decoded outputs 13. Package outline DIP16: plastic dual in-line package; 16 leads (300 mil) SOT38-4 ME seating plane D A2 A A1 L c e Z w M b1 (e 1) b b2 MH 9 16 pin 1 index E 1 8 0 5 10 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 min. A2 max. b b1 b2 c D (1) E (1) e e1 L ME MH w Z (1) max. mm 4.2 0.51 3.2 1.73 1.30 0.53 0.38 1.25 0.
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74HC4017; 74HCT4017 NXP Semiconductors Johnson decade counter with 10 decoded outputs SO16: plastic small outline package; 16 leads; body width 3.9 mm SOT109-1 D E A X c y HE v M A Z 16 9 Q A2 A (A 3) A1 pin 1 index θ Lp 1 L 8 e 0 detail X w M bp 2.5 5 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y Z (1) mm 1.75 0.25 0.10 1.45 1.25 0.25 0.49 0.36 0.25 0.19 10.0 9.
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74HC4017; 74HCT4017 NXP Semiconductors Johnson decade counter with 10 decoded outputs SSOP16: plastic shrink small outline package; 16 leads; body width 5.3 mm D SOT338-1 E A X c y HE v M A Z 9 16 Q A2 A (A 3) A1 pin 1 index θ Lp L 8 1 detail X w M bp e 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y Z (1) θ mm 2 0.21 0.05 1.80 1.65 0.25 0.38 0.25 0.20 0.09 6.4 6.0 5.4 5.2 0.65 7.9 7.
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74HC4017; 74HCT4017 NXP Semiconductors Johnson decade counter with 10 decoded outputs TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm SOT403-1 E D A X c y HE v M A Z 9 16 Q (A 3) A2 A A1 pin 1 index θ Lp L 1 8 e detail X w M bp 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (2) e HE L Lp Q v w y Z (1) θ mm 1.1 0.15 0.05 0.95 0.80 0.25 0.30 0.19 0.2 0.1 5.1 4.9 4.5 4.3 0.
PAGE 20
74HC4017; 74HCT4017 NXP Semiconductors Johnson decade counter with 10 decoded outputs DHVQFN16: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; SOT763-1 16 terminals; body 2.5 x 3.5 x 0.85 mm A B D A A1 E c detail X terminal 1 index area terminal 1 index area C e1 e 2 7 y y1 C v M C A B w M C b L 1 8 Eh e 16 9 15 10 Dh X 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT mm A(1) max. A1 b 1 0.05 0.00 0.30 0.
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74HC4017; 74HCT4017 NXP Semiconductors Johnson decade counter with 10 decoded outputs 14. Abbreviations Table 10. Abbreviations Acronym Description CMOS Complementary Metal Oxide Semiconductor DUT Device Under Test ESD ElectroStatic Discharge HBM Human Body Model MM Machine Model TTL Transistor-Transistor Logic 15. Revision history Table 11. Revision history Document ID Release date Data sheet status Change notice Supersedes 74HC_HCT4017 v.
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74HC4017; 74HCT4017 NXP Semiconductors Johnson decade counter with 10 decoded outputs 16. Legal information 16.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification.
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74HC4017; 74HCT4017 NXP Semiconductors Johnson decade counter with 10 decoded outputs Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. Non-automotive qualified products — Unless this data sheet expressly states that this specific NXP Semiconductors product is automotive qualified, the product is not suitable for automotive use.
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NXP Semiconductors 74HC4017; 74HCT4017 Johnson decade counter with 10 decoded outputs 18. Contents 1 2 3 4 5 5.1 5.2 6 7 8 9 10 11 12 13 14 15 16 16.1 16.2 16.3 16.4 17 18 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 5 Pinning . .