Datasheet

74HC_HCT4094 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 6 — 31 December 2012 10 of 23
NXP Semiconductors
74HC4094; 74HCT4094
8-stage shift-and-store bus register
t
W
pulse width CP HIGH or LOW;
see Figure 8
V
CC
= 2.0 V 80 14 - 100 - 120 - ns
V
CC
= 4.5 V 16 5 - 20 - 24 - ns
V
CC
= 6.0 V 14 4 - 17 - 20 - ns
STR HIGH; see Figure 9
V
CC
= 2.0 V 80 14 - 100 - 120 - ns
V
CC
= 4.5 V 16 5 - 20 - 24 - ns
V
CC
= 6.0 V 14 4 - 17 - 20 - ns
t
su
set-up time D to CP; see Figure 10
V
CC
= 2.0 V 50 14 - 65 - 75 - ns
V
CC
= 4.5 V 10 5 - 13 - 15 - ns
V
CC
= 6.0 V 9 4 - 11 - 13 - ns
CP to STR; see Figure 9
V
CC
= 2.0 V 100 28 - 125 - 150 - ns
V
CC
= 4.5 V 20 10 - 25 - 30 - ns
V
CC
= 6.0 V 17 8 - 21 - 26 - ns
t
h
hold time D to CP; see Figure 10
V
CC
= 2.0 V 3 -6 - 3 - 3 - ns
V
CC
= 4.5 V 3 -2 - 3 - 3 - ns
V
CC
= 6.0 V 3 -2 - 3 - 3 - ns
CP to STR; see Figure 9
V
CC
= 2.0 V 0 -14 - 0 - 0 - ns
V
CC
= 4.5 V 0 -5 - 0 - 0 - ns
V
CC
= 6.0 V 0 -4 - 0 - 0 - ns
f
max
maximum
frequency
CP; see Figure 8
V
CC
= 2.0 V 6.0 28 - 4.8 - 4.0 - MHz
V
CC
= 4.5 V 30 87 - 24 - 20 - MHz
V
CC
=5V; C
L
=15pF - 95 - - - - - MHz
V
CC
= 6.0 V 35 103 - 28 - 24 - MHz
C
PD
power
dissipation
capacitance
C
L
= 50 pF; f = 1 MHz;
V
I
=GNDtoV
CC
[5]
-83- - - - -pF
Table 7. Dynamic characteristics …continued
Voltages are referenced to GND (ground = 0 V); C
L
= 50 pF unless otherwise specified; for test circuit see Figure 12.
Symbol Parameter Conditions 25 C 40 C to +85 C 40 C to +125 C Unit
Min Typ Max Min Max Min Max