Datasheet

74HC_HCT594_3 © NXP B.V. 2006. All rights reserved.
Product data sheet Rev. 03 — 20 December 2006 16 of 26
NXP Semiconductors
74HC594; 74HCT594
8-bit shift register with output register
[1] t
pd
is the same as t
PHL
and t
PLH
.
[2] C
PD
is used to determine the dynamic power dissipation (P
D
in µW):
P
D
=C
PD
× V
CC
2
× f
i
× N+∑(C
L
× V
CC
2
× f
o
) where:
f
i
= input frequency in MHz;
f
o
= output frequency in MHz;
C
L
= output load capacitance in pF;
V
CC
= supply voltage in V;
N = number of inputs switching;
∑(C
L
× V
CC
2
× f
o
) = sum of outputs.
t
W
pulse width SHCP (HIGH or
LOW); see
Figure 9
16 4 - 20 - 24 - ns
STCP (HIGH or
LOW); see
Figure 10
16 4 - 20 - 24 - ns
SHR and STR
(HIGH or LOW);
see
Figure 13
and
Figure 14
16 6 - 20 - 24 - ns
t
su
set-up time DS to SHCP;
see
Figure 11
20 4 - 25 - 30 - ns
SHR to STCP;
see
Figure 12
20 6 - 25 - 30 - ns
SHCP to STCP;
see
Figure 10
20 7 - 25 - 30 - ns
t
h
hold time DS to SHCP;
see
Figure 11
5 −3- 6 - 7 -ns
t
rec
recovery
time
SHR to SHCP
and
STR to STCP;
see
Figure 13
and
Figure 14
10 −5 - 13 - 15 - ns
f
max
maximum
frequency
SHCP or STCP;
see
Figure 9 and
Figure 10
30 92 - 24 - 20 - MHz
V
CC
= 5.0 V;
C
L
= 15 pF
- 100 - - - - - MHz
C
PD
power
dissipation
capacitance
V
I
= GND to V
CC
− 1.5 V;
V
CC
=5V;
f
i
= 1 MHz
[2]
-89- - - - -pF
Table 9. Dynamic characteristics type 74HCT594
…continued
GND = 0 V; V
CC
= 4.5 V; t
r
= t
f
= 6 ns; C
L
= 50 pF; see Figure 15.
Symbol Parameter Conditions 25 °C −40 °C to +85 °C −40 °C to +125 °C Unit
Min Typ Max Min Max Min Max