Datasheet

74HC_HCT595 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet Rev. 7 — 26 January 2015 13 of 24
NXP Semiconductors
74HC595; 74HCT595
8-bit serial-in, serial or parallel-out shift register with output latches; 3-state
Measurement points are given in Table 8.
The shaded areas indicate when the input is permitted to change for predictable output performance.
V
OL
and V
OH
are typical output voltage levels that occur with the output load.
Fig 11. Data set-up and hold times
PQD
*1'
*1'
W
K
W
VX
W
K
W
VX
9
0
9
0
9
0
9
,
9
2+
9
2/
9
,
46RXWSXW
6+&3LQSXW
'6LQSXW
Measurement points are given in Table 8.
V
OL
and V
OH
are typical output voltage levels that occur with the output load.
Fig 12. Master reset to output propagation delays
PQD
05

LQSXW

6+&3LQSXW

46RXWSXW
W
3+/
W
:
W
UHF
9
0
9
2+
9
2/
9
,
*1'
9
,
*1'
9
0
9
0