Datasheet

74HC_HCT595 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet Rev. 7 — 26 January 2015 4 of 24
NXP Semiconductors
74HC595; 74HCT595
8-bit serial-in, serial or parallel-out shift register with output latches; 3-state
6. Pinning information
6.1 Pinning
Fig 5. Pin configuration DIP16, SO16 Fig 6. Pin configuration SSOP16, TSSOP16
+&
+&7
4
9
&
&
4
4
4
'
6
4
2
(
4
67&3
4
6+&3
4
0
5
*1' 46
DDR







+&
+&7
49
&&
44
4
'6
4
2(
4
67&3
4
6+&3
4
05
*1' 46
DDR







(1) This is not a supply pin. The substrate is attached to this pad using conductive die attach material. There is no electrical or
mechanical requirement to solder this pad. However, if it is soldered, the solder land should remain floating or be connected to
GND.
Fig 7. Pin configuration for DHVQFN16
+&7
4 05
4
4
4 2(
4 '6
4 4
*1'
46
4
9
&&







*1'
