Datasheet

74HC_HCT74 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 4 — 27 August 2012 8 of 21
NXP Semiconductors
74HC74; 74HCT74
Dual D-type flip-flop with set and reset; positive edge-trigger
t
su
set-up time nD to nCP; see Figure 7
V
CC
= 2.0 V 75 6 - 90 - ns
V
CC
= 4.5 V 15 2 - 18 - ns
V
CC
= 6.0 V 13 2 - 15 - ns
t
h
hold time nD to nCP; see Figure 7
V
CC
= 2.0 V 3 6- 3 -ns
V
CC
= 4.5 V 3 2- 3 -ns
V
CC
= 6.0 V 3 2- 3 -ns
f
max
maximum
frequency
nCP; see Figure 7
V
CC
= 2.0 V 4.8 23 - 4.0 - MHz
V
CC
= 4.5 V 24 69 - 20 - MHz
V
CC
=5V; C
L
=15pF - 76 - - - MHz
V
CC
= 6.0 V 28 82 - 24 - MHz
C
PD
power
dissipation
capacitance
C
L
=50pF;f=1 MHz;
V
I
=GNDtoV
CC
[4]
-24 - - -pF
74HCT74
t
pd
propagation
delay
nCP to nQ, nQ; see
Figure 7
[2]
V
CC
= 4.5 V - 18 44 - 53 ns
V
CC
=5V; C
L
=15pF - 15 - - - ns
nS
D to nQ, nQ; see
Figure 8
[2]
V
CC
= 4.5 V - 23 50 - 60 ns
V
CC
=5V; C
L
=15pF - 18 - - - ns
nR
D to nQ, nQ; see
Figure 8
[2]
V
CC
= 4.5 V - 24 50 - 60 ns
V
CC
=5V; C
L
=15pF - 18 - - - ns
t
t
transition
time
nQ, nQ; see Figure 7
[3]
V
CC
= 4.5 V - 7 19 - 22 ns
t
W
pulse width nCP HIGH or LOW;
see Figure 7
V
CC
= 4.5 V 23 9 - 27 - ns
nS
D, nRD LOW;
see Figure 8
V
CC
= 4.5 V 20 9 - 24 - ns
t
rec
recovery
time
nSD, nRD; see Figure 8
V
CC
= 4.5 V 8 1 - 9 - ns
t
su
set-up time nD to nCP; see Figure 7
V
CC
= 4.5 V 15 5 - 18 - ns
Table 8. Dynamic characteristics …continued
Voltages are referenced to GND (ground = 0 V); C
L
= 50 pF unless otherwise specified; for test circuit see Figure 9.
Symbol Parameter Conditions T
amb
= 40 C to +85 C T
amb
= 40 C to +125 C Unit
Min Typ
[1]
Max Min Max