Datasheet

74LV138_3 © NXP B.V. 2007. All rights reserved.
Product data sheet Rev. 03 — 15 November 2007 2 of 17
NXP Semiconductors
74LV138
3-to-8 line decoder/demultiplexer; inverting
3. Ordering information
4. Functional diagram
Table 1. Ordering information
Type number Package
Temperature range Name Description Version
74LV138N −40 °C to +125 °C DIP16 plastic dual in-line package; 16 leads (300 mil) SOT38-4
74LV138D −40 °C to +125 °C SO16 plastic small outline package; 16 leads;
body width 3.9 mm
SOT109-1
74LV138DB −40 °C to +125 °C SSOP16 plastic shrink small outline package; 16 leads;
body width 5.3 mm
SOT338-1
74LV138PW −40 °C to +125 °C TSSOP16 plastic thin shrink small outline package; 16 leads;
body width 4.4 mm
SOT403-1
74LV138BQ −40 °C to +125 °C DHVQFN16 plastic dual in-line compatible thermal enhanced very
thin quad flat package; no leads; 16 terminals;
body 2.5 × 3.5 × 0.85 mm
SOT763-1
Fig 1. Logic symbol Fig 2. IEC logic symbol
Y0
Y1
Y2
Y3
Y4
Y5
Y6
Y7
7
9
10
11
12
13
14
15A0
A1
A2
3
2
1
6
5
4
E2
E1
E3
mna370
mna371
7
9
10
11
12
13
14
&
X/Y
15
7
EN
6
5
4
3
2
1
0
6
5
4
3
2
1
1
4
2
7
9
10
11
12
13
14
&
DX
(a) (b)
15
7
6
5
4
3
2
1
0
6
5
4
3
2
1
0
2
G
0
7