Datasheet

9397 750 14501 © Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet Rev. 03 — 4 February 2005 2 of 21
Philips Semiconductors
74LV164
8-bit serial-in/parallel-out shift register
[1] C
PD
is used to determine the dynamic power dissipation (P
D
in µW).
P
D
=C
PD
× V
CC
2
× f
i
× N+Σ(C
L
× V
CC
2
× f
o
) where:
f
i
= input frequency in MHz;
f
o
= output frequency in MHz;
C
L
= output load capacitance in pF;
V
CC
= supply voltage in V;
N = number of inputs switching;
Σ(C
L
× V
CC
2
× f
o
) = sum of the outputs.
[2] The condition is V
I
= GND to V
CC
.
4. Ordering information
f
max
maximum clock
frequency
V
CC
= 3.3 V; C
L
= 15 pF - 78 - MHz
C
I
input capacitance - 3.5 - pF
C
PD
power dissipation
capacitance per gate
V
CC
= 3.3 V
[1] [2]
-40-pF
Table 1: Quick reference data
…continued
GND = 0 V; T
amb
=25 ° C; t
r
=t
f
≤ 2.5 ns.
Symbol Parameter Conditions Min Typ Max Unit
Table 2: Ordering information
Type number Package
Temperature range Name Description Version
74LV164N −40 °C to +125 °C DIP14 plastic dual in-line package; 14 leads (300 mil) SOT27-1
74LV164D −40 °C to +125 °C SO14 plastic small outline package; 14 leads;
body width 3.9 mm
SOT108-1
74LV164DB −40 °C to +125 °C SSOP14 plastic shrink small outline package; 14 leads;
body width 5.3 mm
SOT337-1
74LV164PW −40 °C to +125 °C TSSOP14 plastic thin shrink small outline package; 14 leads;
body width 4.4 mm
SOT402-1
74LV164BQ −40 °C to +125 °C DHVQFN14 plastic dual in-line compatible thermal enhanced very
thin quad flat package; no leads; 14 terminals;
body 2.5 × 3 × 0.85 mm
SOT762-1