Datasheet

9397 750 14501 © Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet Rev. 03 — 4 February 2005 9 of 21
Philips Semiconductors
74LV164
8-bit serial-in/parallel-out shift register
t
rem
removal time MR to CP see Figure 7
V
CC
= 1.2 V - 30 - ns
V
CC
= 2.0 V 19 10 - ns
V
CC
= 2.7 V 14 8 - ns
V
CC
= 3.0 V to 3.6 V 11 6 - ns
V
CC
= 4.5 V to 5.5 V 8 5 - ns
t
su
set-up time Dn to CP see Figure 8
V
CC
= 1.2 V - 15 - ns
V
CC
= 2.0 V 22 5 - ns
V
CC
= 2.7 V 16 4 - ns
V
CC
= 3.0 V to 3.6 V 13 3 - ns
V
CC
= 4.5 V to 5.5 V 9 2 - ns
t
h
hold time Dn to CP see Figure 8
V
CC
= 1.2 V - 10 - ns
V
CC
= 2.0 V 5 3- ns
V
CC
= 2.7 V 5 2- ns
V
CC
= 3.0 V to 3.6 V 5 2- ns
V
CC
= 4.5 V to 5.5 V 5 1- ns
f
max
maximum clock frequency see Figure 6
V
CC
= 2.0 V 14 40 - MHz
V
CC
= 2.7 V 19 58 - MHz
V
CC
= 3.0 V to 3.6 V 24 70 - MHz
V
CC
= 4.5 V to 5.5 V 36 100 - MHz
V
CC
= 3.3 V; C
L
= 15 pF - 78 - MHz
C
PD
power dissipation capacitance
per gate
V
CC
= 3.3 V
[2] [3]
-40-pF
T
amb
= 40 °C to +125 °C
t
PHL
,
t
PLH
propagation delay CP to Qn see Figure 6
V
CC
= 1.2V ---ns
V
CC
= 2.0 V - - 49 ns
V
CC
= 2.7 V - - 36 ns
V
CC
= 3.0 V to 3.6 V - - 29 ns
V
CC
= 4.5 V to 5.5 V - - 24 ns
t
PHL
propagation delay MR to Qn see Figure 7
V
CC
= 1.2V ---ns
V
CC
= 2.0 V - - 49 ns
V
CC
= 2.7 V - - 36 ns
V
CC
= 3.0 V to 3.6 V - - 29 ns
V
CC
= 4.5 V to 5.5 V - - 24 ns
Table 8: Dynamic characteristics
…continued
GND = 0 V; t
r
= t
f
2.5 ns; C
L
= 50 pF; R
L
= 1 k
; for test circuit see Figure 9.
Symbol Parameter Conditions Min Typ Max Unit