Datasheet

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1. General description

The 74LVC125A consists of four non-inverting buffers/line drivers with 3-state outputs

(nY) that are controlled by the output enable input (nOE

). A HIGH at nOE causes the

outputs to assume a high-impedance OFF-state.

Inputs can be driven from either 3.3 V or 5 V devices. When disabled, up to 5.5 V can be

applied to the outputs.

2. Features and benefits

 5 V tolerant inputs/outputs for interfacing with 5 V logic

 Wide supply voltage range from 1.2 V to 3.6 V

 CMOS low power consumption

 Direct interface with TTL levels

 Complies with JEDEC standard:

 JESD8-7A (1.65 V to 1.95 V)

 JESD8-5A (2.3 V to 2.7 V)

 JESD8-C/JESD36 (2.7 V to 3.6 V)

 ESD protection:

 HBM JESD22-A114F exceeds 2000 V

 MM JESD22-A115-B exceeds 200 V

 CDM JESD22-C101E exceeds 1000 V

 Multiple package options

 Specified from 40 C to +85 C and 40 C to +125 C

74LVC125A

Quad buffer/line driver with 5 V tolerant input/outputs; 3-state

Rev. 7 — 11 April 2013 Product data sheet

Summary of content (16 pages)

PAGE 1
74LVC125A Quad buffer/line driver with 5 V tolerant input/outputs; 3-state Rev. 7 — 11 April 2013 Product data sheet 1. General description The 74LVC125A consists of four non-inverting buffers/line drivers with 3-state outputs (nY) that are controlled by the output enable input (nOE). A HIGH at nOE causes the outputs to assume a high-impedance OFF-state. Inputs can be driven from either 3.3 V or 5 V devices. When disabled, up to 5.5 V can be applied to the outputs. 2.
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74LVC125A NXP Semiconductors Quad buffer/line driver with 5 V tolerant input/outputs; 3-state 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74LVC125AD 40 C to +125 C SO14 plastic small outline package; 14 leads; body width 3.9 mm; body thickness 1.47 mm SOT108-1 74LVC125ADB 40 C to +125 C SSOP14 plastic shrink small outline package; 14 leads; body width 5.
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74LVC125A NXP Semiconductors Quad buffer/line driver with 5 V tolerant input/outputs; 3-state 5. Pinning information 14 VCC 1A 2 13 4OE 1Y 3 12 4A terminal 1 index area 2Y 6 9 3A GND 7 8 3Y 3 4 125 2A 5 GND(1) 2Y 6 10 3OE 12 4A 11 4Y 10 3OE 9 8 5 1Y 2OE 3Y 2A 13 4OE 7 11 4Y 4 2 GND 125 2OE 1A 14 VCC 1 1 1OE 1OE 5.1 Pinning 3A 001aad046 Transparent top view 001aad045 (1) This is not a supply pin.
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74LVC125A NXP Semiconductors Quad buffer/line driver with 5 V tolerant input/outputs; 3-state 7. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
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74LVC125A NXP Semiconductors Quad buffer/line driver with 5 V tolerant input/outputs; 3-state 9. Static characteristics Table 6. Static characteristics At recommended operating conditions. Voltages are referenced to GND (ground = 0 V). Symbol Parameter 40 C to +85 C Conditions Min HIGH-level input voltage VIH VCC = 1.2 V VOH HIGH-level output voltage LOW-level output voltage Max Min Unit Max 1.08 - - 1.08 - V - - 0.65  VCC - V VCC = 2.3 V to 2.7 V 1.7 - - 1.
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74LVC125A NXP Semiconductors Quad buffer/line driver with 5 V tolerant input/outputs; 3-state 10. Dynamic characteristics Table 7. Dynamic characteristics Voltages are referenced to GND (ground = 0 V). For test circuit see Figure 8. Symbol Parameter propagation delay tpd 40 C to +85 C Conditions Min Max Min Max - 12.0 - - - ns VCC = 1.65 V to 1.95 V 1.5 5.4 11.0 1.5 12.8 ns VCC = 2.3 V to 2.7 V 1.0 2.9 5.7 1.0 6.7 ns VCC = 2.7 V 1.5 2.8 5.5 1.5 7.0 ns VCC = 3.
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4LVC125A NXP Semiconductors Quad buffer/line driver with 5 V tolerant input/outputs; 3-state 11. AC waveforms VI VM nA input GND tPHL tPLH VOH VM nY output VOL mna230 Measurement points are given in Table 8. VOL and VOH are typical output voltage levels that occur with the output load. Fig 6.
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74LVC125A NXP Semiconductors Quad buffer/line driver with 5 V tolerant input/outputs; 3-state VI tW 90 % negative pulse VM 0V tf tr tr tf VI 90 % positive pulse 0V VM 10 % VM VM 10 % tW VEXT VCC VI RL VO G DUT RT RL CL 001aae331 Test data is given in Table 9. Definitions for test circuit: RL = Load resistance. CL = Load capacitance including jig and probe capacitance. RT = Termination resistance should be equal to output impedance Zo of the pulse generator.
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74LVC125A NXP Semiconductors Quad buffer/line driver with 5 V tolerant input/outputs; 3-state 12. Package outline SO14: plastic small outline package; 14 leads; body width 3.9 mm SOT108-1 D E A X c y HE v M A Z 8 14 Q A2 A (A 3) A1 pin 1 index θ Lp 1 L 7 e detail X w M bp 0 2.5 5 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y Z (1) mm 1.75 0.25 0.10 1.45 1.25 0.25 0.
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74LVC125A NXP Semiconductors Quad buffer/line driver with 5 V tolerant input/outputs; 3-state SSOP14: plastic shrink small outline package; 14 leads; body width 5.3 mm D SOT337-1 E A X c y HE v M A Z 8 14 Q A2 A (A 3) A1 pin 1 index θ Lp L 7 1 detail X w M bp e 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y Z (1) θ mm 2 0.21 0.05 1.80 1.65 0.25 0.38 0.25 0.20 0.09 6.4 6.0 5.4 5.2 0.
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74LVC125A NXP Semiconductors Quad buffer/line driver with 5 V tolerant input/outputs; 3-state TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4.4 mm SOT402-1 E D A X c y HE v M A Z 8 14 Q (A 3) A2 A A1 pin 1 index θ Lp L 1 7 e detail X w M bp 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (2) e HE L Lp Q v w y Z (1) θ mm 1.1 0.15 0.05 0.95 0.80 0.25 0.30 0.19 0.2 0.1 5.1 4.9 4.
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74LVC125A NXP Semiconductors Quad buffer/line driver with 5 V tolerant input/outputs; 3-state DHVQFN14: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; SOT762-1 14 terminals; body 2.5 x 3 x 0.85 mm A B D A A1 E c detail X terminal 1 index area terminal 1 index area C e1 e 2 6 y y1 C v M C A B w M C b L 1 7 Eh e 14 8 13 9 Dh X 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT mm A(1) max. A1 b 1 0.05 0.00 0.30 0.
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74LVC125A NXP Semiconductors Quad buffer/line driver with 5 V tolerant input/outputs; 3-state 13. Abbreviations Table 10. Abbreviations Acronym Description CDM Charged Device Model DUT Device Under Test ESD ElectroStatic Discharge MM Machine Model HBM Human Body Model TTL Transistor-Transistor Logic 14. Revision history Table 11. Revision history Document ID Release date Data sheet status Change notice Supersedes 74LVC125A v.7 20130411 Product data sheet - 74LVC125A v.
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74LVC125A NXP Semiconductors Quad buffer/line driver with 5 V tolerant input/outputs; 3-state 15. Legal information 15.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification.
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74LVC125A NXP Semiconductors Quad buffer/line driver with 5 V tolerant input/outputs; 3-state Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. Non-automotive qualified products — Unless this data sheet expressly states that this specific NXP Semiconductors product is automotive qualified, the product is not suitable for automotive use.
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74LVC125A NXP Semiconductors Quad buffer/line driver with 5 V tolerant input/outputs; 3-state 17. Contents 1 2 3 4 5 5.1 5.2 6 7 8 9 10 11 12 13 14 15 15.1 15.2 15.3 15.4 16 17 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 Pinning information . . . . . . . . . . . . . . . . . . . . . .