Datasheet

ManualsBrandsNXP SEMICONDUCTORS ManualsLogic ICsLogic IC - Gate and inverter NOR gate 74LVC TSOP 5

1. General description

The 74LVC1G02 provides the single 2-input NOR function.

Input can be driven from either 3.3 V or 5 V devices. These features allow the use of

these devices in a mixed 3.3 V and 5 V environment.

Schmitt-trigger action at all inputs makes the circuit tolerant for slower input rise and fall

time.

This device is fully specified for partial power-down applications using I

OFF

The I

OFF

circuitry disables the output, preventing the damaging backflow current through

the device when it is powered down.

2. Features and benefits

 Wide supply voltage range from 1.65 V to 5.5 V

 High noise immunity

 Complies with JEDEC standard:

 JESD8-7 (1.65 V to 1.95 V)

 JESD8-5 (2.3 V to 2.7 V)

 JESD8-B/JESD36 (2.7 V to 3.6 V)

 24 mA output drive (V

=3.0V)

 CMOS low power consumption

 Latch-up performance exceeds 250 mA

 Direct interface with TTL levels

 Inputs accept voltages up to 5 V

 Multiple package options

 ESD protection:

 HBM JESD22-A114F exceeds 2000 V

 MM JESD22-A115-A exceeds 200 V

 Specified from 40 Cto+85 C and 40 C to +125 C

74LVC1G02

Single 2-input NOR gate

Rev. 11 — 29 June 2012 Product data sheet

Summary of content (19 pages)

PAGE 1
74LVC1G02 Single 2-input NOR gate Rev. 11 — 29 June 2012 Product data sheet 1. General description The 74LVC1G02 provides the single 2-input NOR function. Input can be driven from either 3.3 V or 5 V devices. These features allow the use of these devices in a mixed 3.3 V and 5 V environment. Schmitt-trigger action at all inputs makes the circuit tolerant for slower input rise and fall time. This device is fully specified for partial power-down applications using IOFF.
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74LVC1G02 NXP Semiconductors Single 2-input NOR gate 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74LVC1G02GW 40 C to +125 C TSSOP5 plastic thin shrink small outline package; 5 leads; body width 1.
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74LVC1G02 NXP Semiconductors Single 2-input NOR gate 6. Pinning information 6.1 Pinning 74LVC1G02 74LVC1G02 B 1 A 2 GND 3 5 4 B 1 6 VCC A 2 5 n.c. GND 3 4 Y VCC Y 001aab611 Transparent top view 001aab610 Fig 4. Pin configuration SOT353-1 and SOT753 Fig 5. Pin configuration SOT886 74LVC1G02 74LVC1G02 1 B B 1 6 VCC A 2 5 n.c. GND 3 4 Y VCC 4 Y 3 GND 2 A 001aaf052 aaa-003019 Transparent top view Transparent top view Fig 6.
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74LVC1G02 NXP Semiconductors Single 2-input NOR gate 7. Functional description Table 4. Function table[1] Inputs Outputs A B Y L L H L H L H L L H H L [1] H = HIGH voltage level; L = LOW voltage level. 8. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
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74LVC1G02 NXP Semiconductors Single 2-input NOR gate 9. Recommended operating conditions Table 6. Recommended operating conditions Symbol Parameter VCC Conditions Min Typ Max Unit supply voltage 1.65 - 5.5 V VI input voltage 0 - 5.5 V VO output voltage Active mode 0 - VCC V VCC = 0 V; Power-down mode 0 - 5.5 V 40 - +125 C VCC = 1.65 V to 2.7 V - - 20 ns/V VCC = 2.7 V to 5.
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74LVC1G02 NXP Semiconductors Single 2-input NOR gate Table 7. Static characteristics …continued At recommended operating conditions. Voltages are referenced to GND (ground = 0 V). Symbol Parameter 40 C to +85 C Conditions Unit Min Max Min Max - 0.1 10 - 200 A IOFF power-off leakage current ICC supply current VI = 5.5 V or GND; IO = 0 A; VCC = 1.65 V to 5.5 V - 0.1 10 - 200 A ICC additional VCC = 2.3 V to 5.5 V; supply current VI = VCC  0.
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4LVC1G02 NXP Semiconductors Single 2-input NOR gate 12. Waveforms VI VM A, B input GND t PHL t PLH VOH VM Y output mna612 VOL Measurement points are given in Table 9. VOL and VOH are typical output voltage levels that occur with the output. Fig 8. Table 9. The input (A, B) to output (Y) propagation delay times Measurement points Supply voltage Input Output VCC VM VM 1.65 V to 1.95 V 0.5VCC 0.5VCC 2.3 V to 2.7 V 0.5VCC 0.5VCC 2.7 V 1.5 V 1.5 V 3.0 V to 3.6 V 1.5 V 1.5 V 4.
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74LVC1G02 NXP Semiconductors Single 2-input NOR gate Table 10. Test data Supply voltage Input VCC VI tr = tf Load CL RL VEXT tPLH, tPHL 1.65 V to 1.95 V VCC  2.0 ns 30 pF 1 k open 2.3 V to 2.7 V VCC  2.0 ns 30 pF 500  open 2.7 V 2.7 V  2.5 ns 50 pF 500  open 3.0 V to 3.6 V 2.7 V  2.5 ns 50 pF 500  open 4.5 V to 5.5 V VCC  2.5 ns 50 pF 500  open 74LVC1G02 Product data sheet All information provided in this document is subject to legal disclaimers. Rev.
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74LVC1G02 NXP Semiconductors Single 2-input NOR gate 13. Package outline TSSOP5: plastic thin shrink small outline package; 5 leads; body width 1.25 mm E D SOT353-1 A X c y HE v M A Z 5 4 A2 A (A3) A1 θ 1 Lp 3 L e w M bp detail X e1 0 1.5 3 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D(1) E(1) e e1 HE L Lp v w y Z(1) θ mm 1.1 0.1 0 1.0 0.8 0.15 0.30 0.15 0.25 0.08 2.25 1.85 1.35 1.15 0.65 1.3 2.25 2.0 0.425 0.
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74LVC1G02 NXP Semiconductors Single 2-input NOR gate Plastic surface-mounted package; 5 leads SOT753 D E B y A X HE 5 v M A 4 Q A A1 c 1 2 3 Lp detail X bp e w M B 0 1 2 mm scale DIMENSIONS (mm are the original dimensions) UNIT A A1 bp c D E e HE Lp Q v w y mm 1.1 0.9 0.100 0.013 0.40 0.25 0.26 0.10 3.1 2.7 1.7 1.3 0.95 3.0 2.5 0.6 0.2 0.33 0.23 0.2 0.2 0.
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74LVC1G02 NXP Semiconductors Single 2-input NOR gate SOT886 XSON6: plastic extremely thin small outline package; no leads; 6 terminals; body 1 x 1.45 x 0.5 mm b 1 2 3 4x (2) L L1 e 6 5 e1 4 e1 6x A (2) A1 D E terminal 1 index area 0 1 2 mm scale Dimensions (mm are the original dimensions) Unit mm max nom min A(1) 0.5 A1 b D E 0.04 0.25 1.50 1.05 0.20 1.45 1.00 0.17 1.40 0.95 e e1 0.6 0.5 L L1 0.35 0.40 0.30 0.35 0.27 0.32 Notes 1. Including plating thickness. 2.
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74LVC1G02 NXP Semiconductors Single 2-input NOR gate XSON6: plastic extremely thin small outline package; no leads; 6 terminals; body 1 x 1 x 0.5 mm 1 SOT891 b 3 2 4× (1) L L1 e 6 5 e1 4 e1 6× A (1) A1 D E terminal 1 index area 0 1 2 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max A1 max b D E e e1 L L1 mm 0.5 0.04 0.20 0.12 1.05 0.95 1.05 0.95 0.55 0.35 0.35 0.27 0.40 0.32 Note 1. Can be visible in some manufacturing processes.
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74LVC1G02 NXP Semiconductors Single 2-input NOR gate XSON6: extremely thin small outline package; no leads; 6 terminals; body 0.9 x 1.0 x 0.35 mm 1 SOT1115 b 3 2 (4×)(2) L L1 e 6 5 4 e1 e1 (6×)(2) A1 A D E terminal 1 index area 0 0.5 scale Dimensions Unit mm 1 mm A(1) A1 b D E e e1 max 0.35 0.04 0.20 0.95 1.05 nom 0.15 0.90 1.00 0.55 min 0.12 0.85 0.95 0.3 L L1 0.35 0.40 0.30 0.35 0.27 0.32 Note 1. Including plating thickness. 2.
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74LVC1G02 NXP Semiconductors Single 2-input NOR gate XSON6: extremely thin small outline package; no leads; 6 terminals; body 1.0 x 1.0 x 0.35 mm 1 SOT1202 b 3 2 (4×)(2) L L1 e 6 5 4 e1 e1 (6×)(2) A1 A D E terminal 1 index area 0 0.5 scale Dimensions Unit mm 1 mm A(1) A1 b D E e e1 L L1 max 0.35 0.04 0.20 1.05 1.05 0.35 0.40 nom 0.15 1.00 1.00 0.55 0.35 0.30 0.35 min 0.12 0.95 0.95 0.27 0.32 Note 1. Including plating thickness. 2.
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74LVC1G02 NXP Semiconductors Single 2-input NOR gate X2SON5: plastic thermal enhanced extremely thin small outline package; no leads; 5 terminals; body 0.8 x 0.8 x 0.35 mm B A D SOT1226 X A E A1 A3 detail X terminal 1 index area e C v w b 1 2 terminal 1 index area C A B C y1 C y k D h 3 L 5 4 0 1 mm scale Dimensions Unit mm A(1) A1 A3 D Dh E b e k L max 0.35 0.04 0.128 0.85 0.30 0.85 0.27 0.27 nom 0.80 0.25 0.80 0.22 0.48 0.22 min 0.20 0.17 0.040 0.75 0.20 0.75 0.
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74LVC1G02 NXP Semiconductors Single 2-input NOR gate 14. Abbreviations Table 11. Abbreviations Acronym Description CMOS Complementary Metal Oxide Semiconductor DUT Device Under Test ESD ElectroStatic Discharge HBM Human Body Model MM Machine Model TTL Transistor-Transistor Logic 15. Revision history Table 12. Revision history Document ID Release date Data sheet status Change notice Supersedes 74LVC1G02 v.11 20120629 Product data sheet - 74LVC1G02 v.
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74LVC1G02 NXP Semiconductors Single 2-input NOR gate 16. Legal information 16.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification.
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74LVC1G02 NXP Semiconductors Single 2-input NOR gate Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. Non-automotive qualified products — Unless this data sheet expressly states that this specific NXP Semiconductors product is automotive qualified, the product is not suitable for automotive use.
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74LVC1G02 NXP Semiconductors Single 2-input NOR gate 18. Contents 1 2 3 4 5 6 6.1 6.2 7 8 9 10 11 12 13 14 15 16 16.1 16.2 16.3 16.4 17 18 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 Pinning information . . . . . . . .