Datasheet

74LVC1G10 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 4 — 10 September 2014 14 of 17
NXP Semiconductors
74LVC1G10
Single 3-input NAND gate
14. Abbreviations
15. Revision history
Table 11. Abbreviations
Acronym Description
CDM Charged Device Model
CMOS Complementary Metal Oxide Semiconductor
DUT Device Under Test
ESD ElectroStatic Discharge
HBM Human Body Model
MM Machine Model
TTL Transistor-Transistor Logic
Table 12. Revision history
Document ID Release date Data sheet status Change notice Supersedes
74LVC1G10 v.4 20140910 Product data sheet - 74LVC1G10 v.3
Modifications:
• Package outline drawing of SOT886 (Figure 11) modified.
74LVC1G10 v.3 20111208 Product data sheet - 74LVC1G10 v.2
74LVC1G10 v.2 20101021 Product data sheet - 74LVC1G10 v.1
74LVC1G10 v.1 20071002 Product data sheet - -