Datasheet

74LVC1G125 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 11 — 2 July 2012 9 of 20
NXP Semiconductors
74LVC1G125
Bus buffer/line driver; 3-state
Test data is given in Table 10.
Definitions for test circuit:
R
L
= Load resistance.
C
L
= Load capacitance including jig and probe capacitance.
R
T
= Termination resistance should be equal to the output impedance Z
o
of the pulse generator.
V
EXT
= External voltage for measuring switching times.
Fig 10. Test circuit for measuring switching times
V
EXT
V
CC
V
I
V
O
mna616
DUT
C
L
R
T
R
L
R
L
G
Table 10. Test data
Supply voltage Input Load V
EXT
V
CC
V
I
t
r
, t
f
C
L
R
L
t
PLH
, t
PHL
t
PZH
, t
PHZ
t
PZL
, t
PLZ
1.65 V to 1.95 V V
CC
 2.0ns 30pF 1k open GND 2V
CC
2.3 V to 2.7 V V
CC
 2.0 ns 30 pF 500  open GND 2V
CC
2.7 V 2.7 V  2.5 ns 50 pF 500  open GND 6 V
3.0 V to 3.6 V 2.7 V  2.5 ns 50 pF 500  open GND 6 V
4.5 V to 5.5 V V
CC
 2.5 ns 50 pF 500  open GND 2V
CC