Datasheet

ManualsBrandsNXP SEMICONDUCTORS ManualsLogic ICsLogic IC - Demultiplexer Demultiplexer Single supply TSSOP 6

1. General description

The 74LVC1G18 is a 1-of-2 non-inverting demultiplexer with a 3-state output. The device

buffers the data on input pin A and passes it either to output 1Y or 2Y, depending on

whether the state of the select input (pin S) is LOW or HIGH. Input can be driven from

either 3.3 or 5 V devices. These features allow the use of these devices in a mixed

3.3 and 5 V environment.

This device is fully speciﬁed for partial power-down applications using I

OFF

. The I

OFF

circuitry disables the output, preventing the damaging backﬂow current through the device

when it is powered down.

2. Features

n Wide supply voltage range from 1.65 to 5.5 V

n 5 V tolerant input/output for interfacing with 5 V logic

n High noise immunity

n Complies with JEDEC standard:

u JESD8-7 (1.65 V to 1.95 V)

u JESD8-5 (2.3 V to 2.7 V)

u JESD8B/JESD36 (2.7 V to 3.6 V)

n ESD protection:

u HBM EIA/JESD22-A114E exceeds 2000 V

u MM EIA/JESD22-A115-A exceeds 200 V.

n ±24 mA output drive (V

= 3.0 V)

n CMOS low power consumption

n Latch-up performance exceeds 250 mA

n Direct interface with TTL levels

n SOT363 and SOT457 package

n Speciﬁed from −40 to +85 °C and −40 to +125 °C.

3. Ordering information

74LVC1G18

1-of-2 non-inverting demultiplexer with 3-state deselected

output

Rev. 02 — 30 August 2007 Product data sheet

Table 1. Ordering information

Type number Package

Temperature range Name Description Version

74LVC1G18GW −40 °C to +125 °C SC-88 plastic surface-mounted package; 6 leads SOT363

74LVC1G18GV −40 °C to +125 °C SC-74 plastic surface-mounted package (TSOP6); 5 leads SOT457

Summary of content (13 pages)

PAGE 1
74LVC1G18 1-of-2 non-inverting demultiplexer with 3-state deselected output Rev. 02 — 30 August 2007 Product data sheet 1. General description The 74LVC1G18 is a 1-of-2 non-inverting demultiplexer with a 3-state output. The device buffers the data on input pin A and passes it either to output 1Y or 2Y, depending on whether the state of the select input (pin S) is LOW or HIGH. Input can be driven from either 3.3 or 5 V devices. These features allow the use of these devices in a mixed 3.
PAGE 2
74LVC1G18 NXP Semiconductors 1-of-2 non-inverting demultiplexer with 3-state deselected output 4. Marking Table 2. Marking Type number Marking code 74LVC1G18GW VW 74LVC1G18GV V18 5. Functional diagram 1Y 6 S 1 A 3 2Y 4 mnb088 Fig 1. Logic symbol 6. Pinning information 6.1 Pinning 74LVC1G18 S 1 6 1Y GND 2 5 VCC A 3 4 2Y 001aag921 Fig 2. Pin configuration 6.2 Pin description Table 3.
PAGE 3
74LVC1G18 NXP Semiconductors 1-of-2 non-inverting demultiplexer with 3-state deselected output 7. Functional description Table 4. Function table[1] Input Output S A 1Y 2Y L L L Z L H H Z H L Z L H H Z H [1] H = HIGH voltage level; L = LOW voltage level; Z = high-impedance OFF-state 8. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
PAGE 4
74LVC1G18 NXP Semiconductors 1-of-2 non-inverting demultiplexer with 3-state deselected output 10. Static characteristics Table 7. Static characteristics At recommended operating conditions. Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Typ[1] Max Unit Tamb = −40 °C to +85 °C VIH VIL VOH VOL HIGH-level input voltage LOW-level input voltage HIGH-level output voltage LOW-level output voltage VCC = 1.65 V to 1.95 V 0.65 × VCC - - V VCC = 2.3 V to 2.7 V 1.
PAGE 5
74LVC1G18 NXP Semiconductors 1-of-2 non-inverting demultiplexer with 3-state deselected output Table 7. Static characteristics …continued At recommended operating conditions. Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Typ[1] Max VIL VCC = 1.65 V to 1.95 V - - 0.35 × VCC V VCC = 2.3 V to 2.7 V - - 0.7 V VCC = 2.7 V to 3.6 V - - 0.8 V VCC = 4.5 V to 5.5 V - - 0.3 × VCC V VCC − 0.
PAGE 6
74LVC1G18 NXP Semiconductors 1-of-2 non-inverting demultiplexer with 3-state deselected output 11. Dynamic characteristics Table 8. Dynamic characteristics Voltages are referenced to GND (ground = 0 V). For test circuit see Figure 5. Symbol Parameter −40 °C to +85 °C Conditions enable time ten Max Min Max VCC = 1.65 V to 1.95 V 1.0 5.1 10.0 1.0 12.5 ns VCC = 2.3 V to 2.7 V 1.0 3.2 5.5 0.5 6.9 ns VCC = 2.7 V 1.0 3.2 5.4 0.5 6.8 ns VCC = 3.0 V to 3.6 V 1.0 3.0 5.0 0.5 6.
PAGE 7
4LVC1G18 NXP Semiconductors 1-of-2 non-inverting demultiplexer with 3-state deselected output 12. AC waveforms VI VM VM A input GND tPLH tPHL VOH VM nY output VM VOL mnb089 Measurement points are given in Table 9. VOL and VOH are typical output voltage levels that occur with the output load. Fig 3. Input A to output Y propagation delays Table 9. Measurement points VCC VM 1.65 V to 1.95 V Input 0.5 × VCC VI tr = tf VCC ≤ 2.0 ns 2.3 V to 2.7 V 0.5 × VCC VCC ≤ 2.0 ns 2.7 V 1.
PAGE 8
74LVC1G18 NXP Semiconductors 1-of-2 non-inverting demultiplexer with 3-state deselected output VEXT VCC VI RL VO G DUT RT CL RL mna616 Test data is given in Table 10. Definitions for test circuit: RL = Load resistance. CL = Load capacitance including jig and probe capacitance. RT = Termination resistance should be equal to the output impedance Zo of the pulse generator. VEXT = External voltage for measuring switching times. Fig 5. Load circuitry for switching times Table 10.
PAGE 9
74LVC1G18 NXP Semiconductors 1-of-2 non-inverting demultiplexer with 3-state deselected output 13. Package outline Plastic surface-mounted package; 6 leads SOT363 D E B y X A HE 6 5 v M A 4 Q pin 1 index A A1 1 2 e1 3 bp c Lp w M B e detail X 0 1 2 mm scale DIMENSIONS (mm are the original dimensions) UNIT A A1 max bp c D E e e1 HE Lp Q v w y mm 1.1 0.8 0.1 0.30 0.20 0.25 0.10 2.2 1.8 1.35 1.15 1.3 0.65 2.2 2.0 0.45 0.15 0.25 0.15 0.2 0.2 0.
PAGE 10
74LVC1G18 NXP Semiconductors 1-of-2 non-inverting demultiplexer with 3-state deselected output Plastic surface-mounted package (TSOP6); 6 leads D SOT457 E B y A HE 6 X v M A 4 5 Q pin 1 index A A1 c 1 2 3 Lp bp e w M B detail X 0 1 2 mm scale DIMENSIONS (mm are the original dimensions) UNIT A A1 bp c D E e HE Lp Q v w y mm 1.1 0.9 0.1 0.013 0.40 0.25 0.26 0.10 3.1 2.7 1.7 1.3 0.95 3.0 2.5 0.6 0.2 0.33 0.23 0.2 0.2 0.
PAGE 11
74LVC1G18 NXP Semiconductors 1-of-2 non-inverting demultiplexer with 3-state deselected output 14. Abbreviations Table 11. Abbreviations Acronym Description CMOS Complementary Metal Oxide Semiconductor DUT Device Under Test ESD ElectroStatic Discharge HBM Human Body Model MM Machine Model TTL Transistor-Transistor Logic 15. Revision history Table 12.
PAGE 12
74LVC1G18 NXP Semiconductors 1-of-2 non-inverting demultiplexer with 3-state deselected output 16. Legal information 16.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification.
PAGE 13
74LVC1G18 NXP Semiconductors 1-of-2 non-inverting demultiplexer with 3-state deselected output 18. Contents 1 2 3 4 5 6 6.1 6.2 7 8 9 10 11 12 13 14 15 16 16.1 16.2 16.3 16.4 17 18 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 1 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Functional diagram . . . . . . . . . . . . . . .