Datasheet

74LVC1G386_2 © NXP B.V. 2007. All rights reserved.
Product data sheet Rev. 02 — 3 September 2007 7 of 12
NXP Semiconductors
74LVC1G386
3-input EXCLUSIVE-OR gate
Table 9. Measurement points
V
CC
V
M
Input
V
I
t
r
= t
f
1.65 V to 1.95 V 0.5 × V
CC
V
CC
≤ 2.0 ns
2.3 V to 2.7 V 0.5 × V
CC
V
CC
≤ 2.0 ns
2.7 V 1.5 V 2.7 V ≤ 2.5 ns
3.0 V to 3.6 V 1.5 V 2.7 V ≤ 2.5 ns
4.5 V to 5.5 V 0.5 × V
CC
V
CC
≤ 2.5 ns
Test data is given in Table 10.
Definitions for test circuit:
R
L
= Load resistance.
C
L
= Load capacitance including jig and probe capacitance.
R
T
= Termination resistance should be equal to the output impedance Z
o
of the pulse generator.
V
EXT
= External voltage for measuring switching times.
Fig 6. Load circuitry for switching times
V
EXT
V
CC
V
I
V
O
mna616
DUT
C
L
R
T
R
L
R
L
G
Table 10. Test data
Supply voltage Input Load V
EXT
V
CC
V
I
C
L
R
L
t
PLH
, t
PHL
1.65 V to 1.95 V V
CC
30 pF 1 kΩ open
2.3 V to 2.7 V V
CC
30 pF 500 Ω open
2.7 V 2.7 V 50 pF 500 Ω open
3.0 V to 3.6 V 2.7 V 50 pF 500 Ω open
4.5 V to 5.5 V V
CC
50 pF 500 Ω open