Datasheet

74LVC1G80 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 12 — 2 July 2012 2 of 21
NXP Semiconductors
74LVC1G80
Single D-type flip-flop; positive-edge trigger
3. Ordering information
4. Marking
[1] The pin 1 indicator is located on the lower left corner of the device, below the marking code.
5. Functional diagram
Table 1. Ordering information
Type number Package
Temperature range Name Description Version
74LVC1G80GW 40 Cto+125C TSSOP5 plastic thin shrink small outline package;
5 leads; body width 1.25 mm
SOT353-1
74LVC1G80GV 40 Cto+125C SC-74A plastic surface-mounted package; 5 leads SOT753
74LVC1G80GM 40 Cto+125C XSON6 plastic extremely thin small outline package;
no leads; 6 terminals; body 1  1.45  0.5 mm
SOT886
74LVC1G80GF 40 C to +125 C XSON6 plastic extremely thin small outline package;
no leads; 6 terminals; body 1  1  0.5 mm
SOT891
74LVC1G80GN 40 C to +125 C XSON6 extremely thin small outline package; no leads;
6 terminals; body 0.9  1.0  0.35 mm
SOT1115
74LVC1G80GS 40 C to +125 C XSON6 extremely thin small outline package; no leads;
6 terminals; body 1.0  1.0  0.35 mm
SOT1202
74LVC1G80GX 40 C to +125 C X2SON5 X2SON5: plastic thermal enhanced extremely
thin small outline package; no leads; 5
terminals; body 0.8  0.8  0.35 mm
SOT1226
Table 2. Marking codes
Type number Marking
[1]
74LVC1G80GW VT
74LVC1G80GV V80
74LVC1G80GM VT
74LVC1G80GF VT
74LVC1G80GN VT
74LVC1G80GS VT
74LVC1G80GX VT
Fig 1. Logic symbol Fig 2. IEC logic symbol
mna649
2
1
CP
D4Q
001aac523
CP
D
1
2
4