Datasheet

74LVC1G86 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 10 — 2 July 2012 2 of 19
NXP Semiconductors
74LVC1G86
2-input EXCLUSIVE-OR gate
3. Ordering information
4. Marking
[1] The pin 1 indicator is located on the lower left corner of the device, below the marking code.
5. Functional diagram
Table 1. Ordering information
Type number Package
Temperature range Name Description Version
74LVC1G86GW 40 Cto+125C TSSOP5 plastic thin shrink small outline package; 5
leads; body width 1.25 mm
SOT353-1
74LVC1G86GV 40 Cto+125C SC-74A plastic surface-mounted package; 5 leads SOT753
74LVC1G86GM 40 Cto+125C XSON6 plastic extremely thin small outline package;
no leads; 6 terminals; body 1 1.45 0.5 mm
SOT886
74LVC1G86GF 40 C to +125 C XSON6 plastic extremely thin small outline package;
no leads; 6 terminals; body 1 1 0.5 mm
SOT891
74LVC1G86GN 40 C to +125 C XSON6 extremely thin small outline package; no leads;
6 terminals; body 0.9 1.0 0.35 mm
SOT1115
74LVC1G86GS 40 C to +125 C XSON6 extremely thin small outline package; no leads;
6 terminals; body 1.0 1.0 0.35 mm
SOT1202
74LVC1G86GX 40 C to +125 C X2SON5 X2SON5: plastic thermal enhanced extremely
thin small outline package; no leads; 5
terminals; body 0.8 0.8 0.35 mm
SOT1226
Table 2. Marking codes
Type number Marking
[1]
74LVC1G86GW VH
74LVC1G86GV V86
74LVC1G86GM VH
74LVC1G86GF VH
74LVC1G86GN VH
74LVC1G86GS VH
74LVC1G86GX VH
Fig 1. Logic symbol Fig 2. IEC logic symbol
mna038
B
A
Y
2
1
4
1
2
= 1
4
mna039