Datasheet

74LVC2G74 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 10 — 2 April 2013 4 of 25
NXP Semiconductors
74LVC2G74
Single D-type flip-flop with set and reset; positive edge trigger
6. Pinning information
6.1 Pinning
Fig 4. Pin configuration SOT505-2 and SOT765-1 Fig 5. Pin configuration SOT833-1, SOT1089,
SOT1116 and SOT1203
74LVC2G74
CP V
CC
DSD
QRD
GND Q
001aaf642
1
2
3
4
6
5
8
7
74LVC2G74
RD
SD
V
CC
Q
Q
D
CP
GND
001aaf643
36
27
18
45
Transparent top view
Fig 6. Pin configuration SOT996-2 Fig 7. Pin configuration SOT902-2
001aah947
74LVC2G74
Transparent top view
8
7
6
5
1
2
3
4
CP
D
Q
GND
V
CC
SD
RD
Q
001aaf644
DRD
CP
V
CC
Q
SD
GND
Q
Transparent top view
3
6
4
1
5
8
7
2
terminal 1
index area
74LVC2G74