Datasheet

ManualsBrandsNXP SEMICONDUCTORS ManualsLogic ICsLogic IC - Shift register Shift register Three-state DHVQFN 16 (2.5x3.5)

1. General description

The 74LVC595A is an 8-bit serial-in/serial or parallel-out shift register with a storage

The input can be driven from either 3.3 V or 5 V devices. This feature allows the use of

this device in a mixed 3.3 V and 5 V environment.

This device is fully specified for partial Power-down applications using I

OFF

The I

OFF

circuitry disables the output, preventing the damaging backflow current through

the device when it is powered down.

Data is shifted on the positive-going transitions of the SHCP input. The data in the shift

input. If both clocks are connected together, the shift register will always be one clock

pulse ahead of the storage register.

The shift register has a serial input (DS) and a serial output (Q7S) for cascading

purposes. It is also provided with asynchronous reset input MR

(active LOW) for all 8 shift

storage register appears at the output whenever the output enable input (OE

) is LOW.

2. Features and benefits

 5 V tolerant inputs/outputs for interfacing with 5 V logic

 Wide supply voltage range from 1.2 V to 3.6 V

 CMOS low-power consumption

 Direct interface with TTL levels

 Balanced propagation delays

 All inputs have Schmitt-trigger action

 Complies with JEDEC standard JESD8-B/JESD36

 ESD protection:

 HBM JESD22-A114-D exceeds 2000 V

 CDM JESD22-C101-C exceeds 1000 V

 Specified from 40 C to +85 C and 40 C to +125 C.

3. Applications

 Serial-to-parallel data conversion

 Remote control holding register

74LVC595A

8-bit serial-in/serial-out or parallel-out shift register; 3-state

Rev. 2 — 20 June 2014 Product data sheet

Summary of content (20 pages)

PAGE 1
74LVC595A 8-bit serial-in/serial-out or parallel-out shift register; 3-state Rev. 2 — 20 June 2014 Product data sheet 1. General description The 74LVC595A is an 8-bit serial-in/serial or parallel-out shift register with a storage register and 3-state outputs. Both the shift and storage register have separate clocks. The input can be driven from either 3.3 V or 5 V devices. This feature allows the use of this device in a mixed 3.3 V and 5 V environment.
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74LVC595A NXP Semiconductors 8-bit serial-in/serial-out or parallel-out shift register; 3-state 4. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74LVC595AD 40 C to +125 C SO16 plastic small outline package; 16 leads; body width 3.9 mm SOT109-1 74LVC595APW 40 C to +125 C TSSOP16 plastic thin shrink small outline package; 16 leads; SOT403-1 body width 4.
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74LVC595A NXP Semiconductors 8-bit serial-in/serial-out or parallel-out shift register; 3-state 67$*( '6 ' 67$*(6 72 ' 4 67$*( ' 4 )) &3 4 6 4 )) &3 5 5 6+&3 05 ' 4 ' 4 /$7&+ /$7&+ &3 &3 67&3 2( PQD 4 Fig 3. 4 4 4 4 4 4 4 Logic diagram 6+&3 '6 67&3 05 2( = VWDWH 4 = VWDWH 4 = VWDWH 4 = VWDWH 4 4 6 PQD Fig 4. Timing diagram 74LVC595A Product data sheet All information provided in this document is subject to legal disclaimers. Rev.
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74LVC595A NXP Semiconductors 8-bit serial-in/serial-out or parallel-out shift register; 3-state 6. Pinning information 6.1 Pinning WHUPLQDO LQGH[ DUHD 74LVC595A 4 16 VCC 4 '6 2( 67&3 15 Q0 Q3 3 14 DS 4 Q4 4 13 OE 4 Q5 5 12 STCP 4 Q6 6 11 SHCP Q7 7 10 MR GND 8 9 Q7S *1' 6+&3 05 2 4 6 Q2 4 1 4 *1' Q1 9&& 4 /9& $ DDI 7UDQVSDUHQW WRS YLHZ 001aaf569 (1) This is not a supply pin.
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74LVC595A NXP Semiconductors 8-bit serial-in/serial-out or parallel-out shift register; 3-state 7. Functional description Function table[1] Table 3.
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74LVC595A NXP Semiconductors 8-bit serial-in/serial-out or parallel-out shift register; 3-state 9. Recommended operating conditions Table 5. Recommended operating conditions Symbol Parameter VCC supply voltage Conditions functional VI input voltage VO output voltage Tamb ambient temperature t/V input transition rise and fall rate Min Typ Max Unit 1.65 - 3.6 V 1.2 - - V 0 - 5.5 V 3-state 0 - 5.5 V output HIGH or LOW state 0 - VCC V 40 - +125 C VCC = 1.
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4LVC595A NXP Semiconductors 8-bit serial-in/serial-out or parallel-out shift register; 3-state Table 6. Static characteristics …continued At recommended operating conditions. Voltages are referenced to GND (ground = 0 V). Symbol Parameter 40 C to +85 C Conditions [2] 40 C to +125 C Unit Min Typ[1] Max Min Max - 0.1 10 - 20 A IOZ OFF-state output current VI = VIH or VIL; VO = 5.5 V or GND; VCC = 3.6 V IOFF power-off leakage current VCC = 0 V; VI or VO = 5.5 V - 0.
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74LVC595A NXP Semiconductors 8-bit serial-in/serial-out or parallel-out shift register; 3-state Table 7. Dynamic characteristics …continued Voltages are referenced to GND (ground = 0 V). For test circuit see Figure 13. Symbol Parameter ten enable time 40 C to +85 C Conditions OE to Qn; see Figure 12 Max - 17.9 - - - ns 6.4 14.1 2.0 16.2 ns VCC = 2.3 V to 2.7 V 1.5 4.2 8.0 1.5 9.2 ns VCC = 2.7 V 1.5 4.5 7.6 1.5 8.7 ns 1.2 3.8 6.7 1.2 7.7 ns - 9.6 - - - ns 2.
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74LVC595A NXP Semiconductors 8-bit serial-in/serial-out or parallel-out shift register; 3-state Table 7. Dynamic characteristics …continued Voltages are referenced to GND (ground = 0 V). For test circuit see Figure 13. Symbol Parameter 40 C to +85 C Conditions Min th hold time recovery time trec maximum frequency fmax output skew time power dissipation capacitance CPD 40 C to +125 C Max Min Max VCC = 1.65 V to 1.95 V 1.5 0.2 - 2.0 - ns VCC = 2.3 V to 2.7 V 1.5 0.1 - 2.
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74LVC595A NXP Semiconductors 8-bit serial-in/serial-out or parallel-out shift register; 3-state 12. Waveforms IPD[ 9, 6+&3 LQSXW 90 *1' W: W 3+/ W 3/+ 92+ 90 4 6 RXWSXW 92/ PQD Measurement points are given in Table 8. VOL and VOH are typical output voltage drops that occur with the output load. Fig 7.
PAGE 11
74LVC595A NXP Semiconductors 8-bit serial-in/serial-out or parallel-out shift register; 3-state 9, 90 6+&3 LQSXW *1' W VX W VX WK WK 9, 90 '6 LQSXW *1' 92+ 90 4 6 RXWSXW 92/ PQD Measurement points are given in Table 8. The shaded areas indicate when the input is permitted to change for predictable output performance. VOL and VOH are typical output voltage drops that occur with the output load. Fig 9.
PAGE 12
74LVC595A NXP Semiconductors 8-bit serial-in/serial-out or parallel-out shift register; 3-state 9, 90 05 LQSXW *1' W: W UHF 9, 6+&3 LQSXW *1' 90 W 3+/ 92+ 90 4 6 RXWSXW 92/ PQD Measurement points are given in Table 8. VOL and VOH are typical output voltage drops that occur with the output load. Fig 11.
PAGE 13
74LVC595A NXP Semiconductors 8-bit serial-in/serial-out or parallel-out shift register; 3-state W: 9, QHJDWLYH SXOVH 90 90 9 WI WU WU WI 9, SRVLWLYH SXOVH 90 90 9 W: 9(;7 9&& * 9, 5/ 92 '87 57 5/ &/ DDH Test data is given in Table 9. Definitions for test circuit: RL = Load resistance. CL = Load capacitance including jig and probe capacitance. RT = Termination resistance should be equal to output impedance Zo of the pulse generator.
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74LVC595A NXP Semiconductors 8-bit serial-in/serial-out or parallel-out shift register; 3-state 13.
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74LVC595A NXP Semiconductors 8-bit serial-in/serial-out or parallel-out shift register; 3-state '+94)1 SODVWLF GXDO LQ OLQH FRPSDWLEOH WKHUPDO HQKDQFHG YHU\ WKLQ TXDG IODW SDFNDJH QR OHDGV 627 WHUPLQDOV ERG\ [ [ PP % ' $ $ $ ( F GHWDLO ; WHUPLQDO LQGH[ DUHD WHUPLQDO LQGH[ DUHD & H H E \ \ & Y 0 & $ % Z 0 & / (K H 'K ; PP VFDOH ',0(16,216 PP DUH WKH RULJLQDO GLPHQVLRQ
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74LVC595A NXP Semiconductors 8-bit serial-in/serial-out or parallel-out shift register; 3-state 14. Abbreviations Table 10. Abbreviations Acronym Description CDM Charged Device Model CMOS Complementary Metal Oxide Semiconductor DUT Device Under Test ESD ElectroStatic Discharge HBM Human Body Model TTL Transistor-Transistor Logic 15. Revision history Table 11. Revision history Document ID Release date Data sheet status Change notice Supersedes 74LVC595A v.
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74LVC595A NXP Semiconductors 8-bit serial-in/serial-out or parallel-out shift register; 3-state 16. Legal information 16.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification.
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74LVC595A NXP Semiconductors 8-bit serial-in/serial-out or parallel-out shift register; 3-state Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. Non-automotive qualified products — Unless this data sheet expressly states that this specific NXP Semiconductors product is automotive qualified, the product is not suitable for automotive use.
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74LVC595A NXP Semiconductors 8-bit serial-in/serial-out or parallel-out shift register; 3-state 18. Contents 1 2 3 4 5 6 6.1 6.2 7 8 9 10 11 12 13 14 15 16 16.1 16.2 16.3 16.4 17 18 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Functional diagram . . . . . . . . . . . . . . . . . . . . .