Datasheet

74LVCV2G66 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 5 — 29 March 2013 15 of 23
NXP Semiconductors
74LVCV2G66
Overvoltage tolerant bilateral switch
a. Test circuit
b. Input and output pulse definitions
Q
inj
= V
O
 C
L
.
V
O
= output voltage variation.
R
gen
= generator resistance.
V
gen
= generator voltage.
Fig 19. Test circuit for measuring charge injection
001aag495
V
O
V
CC
nZ/nYnY/nZ
nE
logic
input
R
L
1 MΩ
R
gen
C
L
0.1 nF
V
gen
G
mna675
onoff
logic
input (nE)
V
O
off
ΔV
O