Datasheet

ManualsBrandsNXP SEMICONDUCTORS ManualsLogic ICsLogic IC - Inverter Inverter 74LVT SO 14

1. General description

The 74LVT14 is a high-performance BiCMOS product designed for V

operation at 3.3 V.

It is capable of transforming slowly changing input signals into sharply deﬁned, jitter free

output signals. In addition, it has a greater noise margin than conventional inverters.

Each circuit contains a Schmitt trigger followed by a Darlington level shifter and a phase

splitter driving a TTL totem-pole output. The Schmitt trigger uses positive feedback to

effectively speed-up slow input transitions, and provide different input threshold voltages

for positive-going and negative-going inputs. The threshold differential (typically 600 mV)

is determined internally by resistor ratios and is insensitive to temperature and supply

voltage variations.

2. Features

n Different positive and negative going input threshold voltages

n Tolerant of slow input transitions

n High noise immunity

n TTL input and output switching levels

n Output capability: +32 mA/−20 mA

n Latch-up protection exceeds 500 mA per JESD78 class II level A

n ESD protection:

u HBM JESD22-A114E exceeds 2000 V

u MM JESD22-A115-A exceeds 200 V

3. Ordering information

74LVT14

3.3 V hex inverter Schmitt trigger

Rev. 02 — 25 April 2008 Product data sheet

Table 1. Ordering information

Type number Package

Temperature range Name Description Version

74LVT14D −40 °Cto+85°C SO14 plastic small outline package; 14 leads;

body width 7.5 mm

SOT108-1

74LVT14DB −40 °Cto+85°C SSOP14 plastic shrink small outline package; 14 leads;

body width 5.3 mm

SOT337-1

74LVT14PW −40 °Cto+85°C TSSOP14 plastic thin shrink small outline package; 14 leads;

body width 4.4 mm

SOT402-1

74LVT14BQ −40 °Cto+85°C DHVQFN14 plastic dual in-line compatible thermal enhanced very

thin quad ﬂat package; no leads; 14 terminals;

body 2.5 × 4.5 × 0.85 mm

SOT762-1

Summary of content (13 pages)

PAGE 1
74LVT14 3.3 V hex inverter Schmitt trigger Rev. 02 — 25 April 2008 Product data sheet 1. General description The 74LVT14 is a high-performance BiCMOS product designed for VCC operation at 3.3 V. It is capable of transforming slowly changing input signals into sharply defined, jitter free output signals. In addition, it has a greater noise margin than conventional inverters. Each circuit contains a Schmitt trigger followed by a Darlington level shifter and a phase splitter driving a TTL totem-pole output.
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74LVT14 NXP Semiconductors 3.3 V hex inverter Schmitt trigger 4. Functional diagram 1 3 5 9 11 13 1A 1Y 2A 2Y 3A 3Y 4A 4Y 5A 5Y 6A 6Y 1 2 3 4 5 6 9 8 11 10 13 12 2 4 6 8 10 12 Y 001aac497 mna204 Fig 1. A Logic symbol Fig 2. mna025 IEC logic symbol Fig 3. Logic diagram 5. Pinning information 5.
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74LVT14 NXP Semiconductors 3.3 V hex inverter Schmitt trigger 5.2 Pin description Table 2. Pin description Symbol Pin Description 1A to 6A 1, 3, 5, 9, 11, 13 data input 1Y to 6Y 2, 4, 6, 8, 10, 12 data output GND 7 ground (0 V) VCC 14 positive supply voltage 6. Functional description Table 3. Function selection Inputs Output nA nY L H H L [1] H = HIGH voltage level; L = LOW voltage level. 7. Limiting values Table 4.
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74LVT14 NXP Semiconductors 3.3 V hex inverter Schmitt trigger 8. Recommended operating conditions Table 5. Recommended operating conditions Symbol Parameter VCC Conditions Min Typ Max Unit supply voltage 2.7 - 3.6 V VI input voltage 0 - 5.5 V IOH HIGH-level output current −20 - - mA IOL LOW-level output current - - 32 mA Tamb ambient temperature in free air −40 - +85 °C ∆t/∆V input transition rise and fall rate output enabled 0 - 10 ns/V 9.
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74LVT14 NXP Semiconductors 3.3 V hex inverter Schmitt trigger 10. Dynamic characteristics Table 7. Dynamic characteristics Voltages are referenced to GND (ground = 0 V). For test circuit see Figure 8. Symbol Parameter LOW to HIGH propagation delay tPLH −40 °C to +85 °C Conditions VCC = 3.3 V + 0.3 V HIGH to LOW propagation delay Max - - 6.9 ns 1.0 3.8 5.7 ns - - 4.1 ns 1.0 3.2 4.5 ns nA to nY VCC = 2.7 V VCC = 3.3 V + 0.3 V [1] Min nA to nY VCC = 2.
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74LVT14 NXP Semiconductors 3.3 V hex inverter Schmitt trigger Table 8. Measurement points VCC 2.7 V to 3.6 V Input Output VM VM 1.5 V 1.5 V VI tW 90 % negative pulse VM 0V tf tr tr tf VI 90 % positive pulse 0V VM 10 % VM VM 10 % tW VCC PULSE GENERATOR VI VO DUT RT CL RL 001aaf615 Test data is given in given in Table 9.
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4LVT14 NXP Semiconductors 3.3 V hex inverter Schmitt trigger 12. Package outline SO14: plastic small outline package; 14 leads; body width 3.9 mm SOT108-1 D E A X c y HE v M A Z 8 14 Q A2 A (A 3) A1 pin 1 index θ Lp 1 L 7 e detail X w M bp 0 2.5 5 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y Z (1) mm 1.75 0.25 0.10 1.45 1.25 0.25 0.49 0.36 0.25 0.19 8.75 8.55 4.
PAGE 8
74LVT14 NXP Semiconductors 3.3 V hex inverter Schmitt trigger SSOP14: plastic shrink small outline package; 14 leads; body width 5.3 mm D SOT337-1 E A X c y HE v M A Z 8 14 Q A2 A (A 3) A1 pin 1 index θ Lp L 7 1 detail X w M bp e 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y Z (1) θ mm 2 0.21 0.05 1.80 1.65 0.25 0.38 0.25 0.20 0.09 6.4 6.0 5.4 5.2 0.65 7.9 7.6 1.25 1.03 0.63 0.9 0.
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74LVT14 NXP Semiconductors 3.3 V hex inverter Schmitt trigger TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4.4 mm SOT402-1 E D A X c y HE v M A Z 8 14 Q (A 3) A2 A A1 pin 1 index θ Lp L 1 7 e detail X w M bp 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (2) e HE L Lp Q v w y Z (1) θ mm 1.1 0.15 0.05 0.95 0.80 0.25 0.30 0.19 0.2 0.1 5.1 4.9 4.5 4.3 0.65 6.6 6.2 1 0.75 0.
PAGE 10
74LVT14 NXP Semiconductors 3.3 V hex inverter Schmitt trigger DHVQFN14: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; SOT762-1 14 terminals; body 2.5 x 3 x 0.85 mm A B D A A1 E c detail X terminal 1 index area terminal 1 index area C e1 e 2 6 y y1 C v M C A B w M C b L 1 7 Eh e 14 8 13 9 Dh X 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT mm A(1) max. A1 b 1 0.05 0.00 0.30 0.18 c D (1) Dh E (1) Eh 0.2 3.
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74LVT14 NXP Semiconductors 3.3 V hex inverter Schmitt trigger 13. Abbreviations Table 10. Abbreviations Acronym Description BiCMOS Integrated Bipolar junction transistors and CMOS DUT Device Under Test ESD ElectroStatic Discharge HBM Human Body Model TTL Transistor-Transistor Logic 14. Revision history Table 11.
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74LVT14 NXP Semiconductors 3.3 V hex inverter Schmitt trigger 15. Legal information 15.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification.
PAGE 13
74LVT14 NXP Semiconductors 3.3 V hex inverter Schmitt trigger 17. Contents 1 2 3 4 5 5.1 5.2 6 7 8 9 10 11 12 13 14 15 15.1 15.2 15.3 15.4 16 17 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 1 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 2 Pinning . . . . . . . . . .