Datasheet

1. Product profile
1.1 General description
Logic level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic
package using TrenchMOS technology. This product has been designed and qualified to
the appropriate AEC standard for use in automotive critical applications.
1.2 Features and benefits
 AEC Q101 compliant
 Low conduction losses due to low
on-state resistance
 Suitable for logic level gate drive
sources
 Suitable for thermally demanding
environments due to 185 °C rating
1.3 Applications
 12 V, 24 V and 42 V loads
 Automotive systems
 General purpose power switching
 Motors, lamps and solenoids
1.4 Quick reference data
BUK9217-75B
N-channel TrenchMOS logic level FET
Rev. 02 — 3 February 2011 Product data sheet
DPAK
Table 1. Quick reference data
Symbol Parameter Conditions Min Typ Max Unit
V
DS
drain-source voltage T
j
≥ 25 °C; T
j
≤ 185 °C - - 75 V
I
D
drain current V
GS
=5V; T
mb
=25°C;
see Figure 1; see Figure 3
--64A
P
tot
total power dissipation T
mb
=25°C; see Figure 2 --167W
Static characteristics
R
DSon
drain-source on-state
resistance
V
GS
=10V; I
D
=25A; T
j
= 25 °C - 13.4 15 mΩ
V
GS
=5V; I
D
=25A; T
j
=25°C;
see Figure 10
; see Figure 11
-14.417mΩ
Avalanche ruggedness
E
DS(AL)S
non-repetitive
drain-source
avalanche energy
I
D
=64A; V
sup
≤ 75 V;
R
GS
=50Ω; V
GS
=5V;
T
j(init)
= 25 °C; unclamped
--147mJ
Dynamic characteristics
Q
GD
gate-drain charge V
GS
=5V; I
D
=25A; V
DS
=60V;
T
j
= 25 °C; see Figure 12
-14-nC