BUK9511-55A; BUK9611-55A TrenchMOS™ logic level FET Rev. 01 — 7 February 2001 Product specification 1. Description N-channel enhancement mode field-effect power transistor in a plastic package using TrenchMOS™ technology, featuring very low on-state resistance. Product availability: BUK9511-55A in SOT78 (TO-220AB) BUK9611-55A in SOT404 (D 2-PAK). 2. Features ■ ■ ■ ■ TrenchMOS™ technology Q101 compliant 175 °C rated Logic level compatible. 3.
Philips Semiconductors BUK9511-55A; BUK9611-55A TrenchMOS™ logic level FET 5. Quick reference data Table 2: Quick reference data Symbol Parameter Conditions Typ Max Unit − 55 V VDS drain-source voltage (DC) ID drain current (DC) Tmb = 25 °C; VGS = 5 V − 75 A Ptot total power dissipation Tmb = 25 °C − 166 W Tj junction temperature − 175 °C RDSon drain-source on-state resistance Tj = 25 °C; VGS = 5 V; ID = 25 A 9 11 Tj = 25 °C; VGS = 4.5 V; ID = 25 A − 12 mΩ mΩ 6.
BUK9511-55A; BUK9611-55A Philips Semiconductors TrenchMOS™ logic level FET 03aa24 120 03na19 120 Ider (%) Pder (%) 100 100 80 80 60 60 40 40 20 20 0 0 0 25 50 75 100 125 0 150 175 200 Tmb (oC) 25 50 75 100 125 150 175 200 Tmb (oC) VGS ≥ 4.5 V P tot P der = ---------------------- × 100% P ° ID I der = ------------------- × 100% I ° tot ( 25 C ) D ( 25 C ) Fig 1. Normalized total power dissipation as a function of mounting base temperature. Fig 2.
BUK9511-55A; BUK9611-55A Philips Semiconductors TrenchMOS™ logic level FET 7. Thermal characteristics Table 4: Thermal characteristics Symbol Parameter Conditions Value Unit Rth(j-a) thermal resistance from junction to ambient vertical in still air; SOT78 package 60 K/W mounted on printed circuit board; minimum footprint; SOT404 package 50 K/W Figure 4 0.9 K/W Rth(j-mb) thermal resistance from junction to mounting base 7.1 Transient thermal impedance 1 Zth(j-mb) (K/W) 03nd79 δ = 0.
BUK9511-55A; BUK9611-55A Philips Semiconductors TrenchMOS™ logic level FET 8. Characteristics Table 5: Characteristics Tj = 25 °C unless otherwise specified Symbol Parameter Conditions Min Typ Max Unit Tj = 25 °C 55 − − V Tj = −55 °C 50 − − V Tj = 25 °C 1 1.5 2 V Tj = 175 °C 0.5 − − V Tj = −55 °C − − 2.3 V Tj = 25 °C − 0.05 10 µA Tj = 175 °C − − 500 µA − 2 100 nA Tj = 25 °C − 9 11 mΩ Tj = 175 °C − − 22 mΩ VGS = 4.
BUK9511-55A; BUK9611-55A Philips Semiconductors TrenchMOS™ logic level FET Table 5: Characteristics…continued Tj = 25 °C unless otherwise specified Symbol Parameter Conditions Min Typ Max Unit Source-drain diode VSD source-drain (diode forward) voltage IS = 25 A; VGS = 0 V; Figure 15 − 0.85 1.
BUK9511-55A; BUK9611-55A Philips Semiconductors TrenchMOS™ logic level FET 03aa36 10-1 03aa33 2.5 VGS(th) ID (V) max (A) 10-2 2 typ 10-3 1.5 min 1 10-4 0.5 10-5 0 10-6 -60 -20 20 60 100 min 0 140 180 Tj (oC) 0.5 1 typ 1.5 max 2 2.5 3 VGS (V) Tj = 25 °C; VDS = VGS ID = 1 mA; VDS = VGS Fig 9. Gate-source threshold voltage as a function of junction temperature. 03nd72 80 gfs (S) 60 Fig 10. Sub-threshold drain current as a function of gate-source voltage.
BUK9511-55A; BUK9611-55A Philips Semiconductors TrenchMOS™ logic level FET 03nd73 100 03nd71 5 VGS (V) ID (A) 80 4 VDD= 44 V VDD= 14 V 60 3 40 2 20 1 Tj = 175 oC Tj = 25 oC 0 0 0 1 2 3 4 0 VGS (V) 20 40 60 QG (nC) 80 Tj = 25 °C; ID = 25 A VDS = 25 V Fig 13. Transfer characteristics: drain current as a function of gate-source voltage; typical values. Fig 14. Gate-source voltage as a function of turn-on gate charge; typical values.
BUK9511-55A; BUK9611-55A Philips Semiconductors TrenchMOS™ logic level FET 9. Package outline Plastic single-ended package; heatsink mounted; 1 mounting hole; 3-lead TO-220AB E SOT78 A A1 P q mounting base D1 D L1 L2(1) Q b1 L 1 2 3 b c e e 0 5 10 mm scale DIMENSIONS (mm are the original dimensions) (1) UNIT A A1 b b1 c D D1 E e L L1 L2 max. P q Q mm 4.5 4.1 1.39 1.27 0.9 0.7 1.3 1.0 0.7 0.4 15.8 15.2 6.4 5.9 10.3 9.7 2.54 15.0 13.5 3.30 2.79 3.0 3.8 3.
BUK9511-55A; BUK9611-55A Philips Semiconductors TrenchMOS™ logic level FET Plastic single-ended surface mounted package (Philips version of D2-PAK); 3 leads (one lead cropped) SOT404 A A1 E mounting base D1 D HD 2 Lp 1 3 c b e e Q 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A A1 b c D max. D1 E e Lp HD Q mm 4.50 4.10 1.40 1.27 0.85 0.60 0.64 0.46 11 1.60 1.20 10.30 9.70 2.54 2.90 2.10 15.40 14.80 2.60 2.
BUK9511-55A; BUK9611-55A Philips Semiconductors TrenchMOS™ logic level FET 10. Soldering 10.85 10.60 10.50 handbook, full pagewidth 1.50 7.50 7.40 1.70 2.25 2.15 8.15 8.275 8.35 1.50 4.60 0.30 4.85 5.40 7.95 8.075 3.00 0.20 1.20 1.30 1.55 solder lands solder resist 5.08 MSD057 occupied area solder paste Dimensions in mm. Fig 18. Reflow soldering footprint for SOT404. © Philips Electronics N.V. 2001. All rights reserved. 9397 750 07916 Product specification Rev.
Philips Semiconductors BUK9511-55A; BUK9611-55A TrenchMOS™ logic level FET 11. Revision history Table 6: Revision history Rev Date 01 20010207 CPCN Description - Product Specification; initial version © Philips Electronics N.V. 2001. All rights reserved. 9397 750 07916 Product specification Rev.
BUK9511-55A; BUK9611-55A Philips Semiconductors TrenchMOS™ logic level FET 12. Data sheet status Datasheet status Product status Definition [1] Objective specification Development This data sheet contains the design target or goal specifications for product development. Specification may change in any manner without notice. Preliminary specification Qualification This data sheet contains preliminary data, and supplementary data will be published at a later date.
Philips Semiconductors BUK9511-55A; BUK9611-55A TrenchMOS™ logic level FET Philips Semiconductors - a worldwide company Argentina: see South America Australia: Tel. +61 2 9704 8141, Fax. +61 2 9704 8139 Austria: Tel. +43 160 101, Fax. +43 160 101 1210 Belarus: Tel. +375 17 220 0733, Fax. +375 17 220 0773 Belgium: see The Netherlands Brazil: see South America Bulgaria: Tel. +359 268 9211, Fax. +359 268 9102 Canada: Tel. +1 800 234 7381 China/Hong Kong: Tel. +852 2 319 7888, Fax.
Philips Semiconductors BUK9511-55A; BUK9611-55A TrenchMOS™ logic level FET Contents 1 2 3 4 5 6 7 7.1 8 9 10 11 12 13 14 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Pinning information . . . . . . . . . . . . . . . . . . . . . . 1 Quick reference data . . . . . . . . . . . . . . . . . . . . . 2 Limiting values. . . . . . . . . . . . .