Information

NXP Semiconductors
AN11022
CLRC663 Quickstart Guide
4.4.2 FeliCa for ID2 sized antenna
Table 15. Register settings FeliCa ID2 sized antenna
Reg Reg descr 212 kbit/s 424 kbit/s
28
DrvMode_Reg
0x8F
0x8F
29
TxAmp_Reg
0x17
0x17
2A
DrvCon_Reg
0x01
0x01
2B
TxI_Reg
0x06
0x06
2C
TXCrcCon
0x09
0x09
2D
RxCrcCon
0x09
0x09
2E
TxDataNum
0x08
0x08
2F
TxModWidth
0x00
0x00
30
TxSym10BurstLen
0x03
0x03
31
TxWaitCtrl
0x80
0x80
32
TxWaitLo
0x12
0x12
33
TxFrameCon
0x01
0x01
34
RXSOFD
0x00
0x00
35
RxCtrl
0x05
0x06
36
RxWait
0x10
0x40
37
RxTreshold
0x3F
0x3F
38
Rcv
0x12
0x12
39
RxAna
0x02
0x02
48
TxBitMod
0x80
0x80
4A
TxDataCon
0x05
0x06
4B
TxDataMod
0x01
0x01
4C
TxSymFreq
0x05
0x06
4D
TxSym0H
0xB2
0xB2
4E
TxSym0L
0x4D
0x4D
4F
TxSym1H
0x00
0x00
50
TxSym1L
0x00
0x00
51
TxSym2
0x00
0x00
52
TxSym3
0x00
0x00
53
TxSym10Len
0x0F
0x0F
54
TxSym32Len
0x00
0x00
55
TxSym10BurstCtrl
0x01
0x01
56
TxSym10Mod
0x01
0x01
57
TxSym32Mod
0x00
0x00
58
RxBitMod
0x18
0x18
59
RxEofSym
0x00
0x00
5A
RxSyncValH
0xB2
0xB2
5B
RxSyncValL
0x4D
0x4D
5C
RxSyncMod
0xF0
0xF0
5D
RxMod
0x19
0x19
5E
RxCorr
0x20
0x50
5F
RxSvette_Reg
0xF0
0xF0
TX_Protected
RX_Protected
AN11022 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2015. All rights reserved.
Application note
COMPANY PUBLIC
Rev. 1.2 — 14 January 2015
205912
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