Information
NXP Semiconductors
AN11022
CLRC663 Quickstart Guide
4.5.2 ISO/IEC 15693 for ID2 sized antenna
Table 18. Register settings I-Code ID2 sized antenna
Reg Reg descr
SLI ¼
SSC26
SLI ¼
SSC52
SLI 1/256
DSC
28
DrvMode_Reg
0x8F
0x8F
0x8E
29
TxAmp_Reg
0x10
0x10
0x10
2A
DrvCon_Reg
0x01
0x01
0x01
2B
TxI_Reg
0x06
0x06
0x06
2C
TXCrcCon
0x7B
0x7B
0x7B
2D
RxCrcCon
0x7B
0x7B
0x7B
2E
TxDataNum
0x08
0x08
0x08
2F
TxModWidth
0x00
0x00
0x00
30
TxSym10BurstLen
0x00
0x00
0x00
31
TxWaitCtrl
0x88
0x88
0x88
32
TxWaitLo
0xA9
0xA9
0xA9
33
TxFrameCon
0x0F
0x0F
0x0F
34
RXSOFD
0x00
0x00
0x00
35
RxCtrl
0x02
0x03
0x02
36
RxWait
0x10
0x10
0x10
37
RxTreshold
0x44
0x44
0x44
38
Rcv
0x12
0x12
0x12
39
RxAna
0x06
0x06
0x06
48
TxBitMod
0x00
0x00
0x00
4A
TxDataCon
0x83
0x83
0x93
4B
TxDataMod
0x04
0x04
0x04
4C
TxSymFreq
0x40
0x40
0x40
4D
TxSym0H
0x00
0x00
0x00
4E
TxSym0L
0x00
0x00
0x00
4F
TxSym1H
0x00
0x00
0x00
50
TxSym1L
0x00
0x00
0x00
51
TxSym2
0x84
0x84
0x81
52
TxSym3
0x02
0x02
0x02
53
TxSym10Len
0x00
0x00
0x00
54
TxSym32Len
0x37
0x37
0x37
55
TxSym10BurstCtrl
0x00
0x00
0x00
56
TxSym10Mod
0x00
0x00
0x00
57
TxSym32Mod
0x00
0x00
0x00
58
RxBitMod
0x00
0x00
0x00
59
RxEofSym
0x1D
0x1D
0x1D
5A
RxSyncValH
0x00
0x00
0x00
5B
RxSyncValL
0x01
0x01
0x01
5C
RxSyncMod
0x00
0x00
0x00
5D
RxMod
0x24
0x24
0x26
5E
RxCorr
0x60
0x40
0x60
5F
RxSvette_Reg
0xF0
0xF0
0xF0
TX_Protected
RX_Protected
AN11022 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2015. All rights reserved.
Application note
COMPANY PUBLIC
Rev. 1.2 — 14 January 2015
205912
36 of 45
