Datasheet

GTL2002 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 8 — 19 August 2013 3 of 27
NXP Semiconductors
GTL2002
2-bit bidirectional low voltage translator
5. Functional diagram
6. Pinning information
6.1 Pinning
Fig 1. Functional diagram
GREF
SREF
DREF
S1
D1
002aac784
S2
D2
Fig 2. Pin configuration for SO8 Fig 3. Pin configuration for TSSOP8
(MSOP8)
Fig 4. Pin configuration for VSSOP8 Fig 5. Pin configuration for XQFN8
GTL2002D
GND GREF
SREF DREF
S1
D1
S2 D2
002aac777
1
2
3
4
6
5
8
7
GTL2002DP
GND GREF
SREF DREF
S1 D1
S2 D2
002aac778
1
2
3
4
6
5
8
7
GTL2002DC
SREF GREF
S1 DREF
S2 D1
GND D2
002aac779
1
2
3
4
6
5
8
7
002aac780
GTL2002GM
Transparent top view
terminal 1
index area
2
3
1
SREF
S1
GND
6
5
7
D1
D2
DREF
4S2 8 GREF