Datasheet
1. General description
The HEF4520B is a dual 4-bit internally synchronous binary counter. The counter has an
active HIGH clock input (nCP0) and an active LOW clock input (nCP
1), buffered outputs
from all four bit positions (nQ0 to nQ3) and an active HIGH overriding asynchronous
master reset input (nMR).
The counter advances on either the LOW-to-HIGH transition of the nCP0 input if nCP
1 is
HIGH or the HIGH-to-LOW transition of the nCP
1 input if nCP0 is LOW. Either nCP0 or
nCP
1 may be used as the clock input to the counter while the other clock input may be
used as a clock enable input. Schmitt trigger action makes the clock input highly tolerant
of slower clock rise and fall times. A HIGH on nMR resets the counter (nQ0 to
nQ3 = LOW) independent of nCP0 and nCP
1.
It operates over a recommended V
DD
power supply range of 3 V to 15 V referenced to V
SS
(usually ground). Unused inputs must be connected to V
DD
, V
SS
, or another input.
2. Features and benefits
Tolerant of slow clock rise and fall times
Fully static operation
5 V, 10 V, and 15 V parametric ratings
Standardized symmetrical output characteristics
Specified from 40 C to +85 C
Complies with JEDEC standard JESD 13-B
3. Ordering information
HEF4520B
Dual binary counter
Rev. 6 — 18 November 2011 Product data sheet
Table 1. Ordering information
All types operate from
40
C to +85
C.
Type number Package
Name Description Version
HEF4520BP DIP16 plastic dual in-line package; 16 leads (300 mil) SOT38-4
HEF4520BT SO16 plastic small outline package; 16 leads; body width 3.9 mm SOT109-1