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AN10050

Designing a Hi-Speed USB host PCI adapter using the

ISP1562, ISP1563

Rev. 04 — 1 November 2007 Application note

Document information

Info Content

Keywords isp1562; isp1563; usb; universal serial bus; host; pci adapter

Abstract This document contains a description of the ISP1562/3 application

schematics and the PCB design recommendations.

Summary of content (18 pages)

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AN10050 Designing a Hi-Speed USB host PCI adapter using the ISP1562, ISP1563 Rev. 04 — 1 November 2007 Application note Document information Info Content Keywords isp1562; isp1563; usb; universal serial bus; host; pci adapter Abstract This document contains a description of the ISP1562/3 application schematics and the PCB design recommendations.
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AN10050 NXP Semiconductors Designing a Hi-Speed USB host PCI adapter using ISP1562/63 Revision history Rev Date Description 04 20071101 Fourth revision. Corrected typo in Section 4: it is 2.5 inches ± 0.1 inch, not ± 1 inch. Last line of Section 3.4. 03 20061212 Third revision. Updated Fig 6. 02 20060707 Second revision. Updated Section 5. 01 20051004 First release. Contact information For additional information, please visit: http://www.nxp.
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AN10050 NXP Semiconductors Designing a Hi-Speed USB host PCI adapter using ISP1562/63 1. Introduction The ISP1562 and the ISP1563 are Hi-Speed Universal Serial Bus (USB) host controllers (HCs) that can be directly connected to a standard 32-bit, 33 MHz PCI bus. For the rest of this document, they will be known as ‘ISP1562/3’. The ISP1562/3 complies with PCI Local Bus Specification Rev. 2.2 and PCI Bus Power Management Interface Specification Rev. 1.1.
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AN10050 NXP Semiconductors Designing a Hi-Speed USB host PCI adapter using ISP1562/63 3. Register HcRhStatus = 18000h. This implies that bit LPSC = 1b (port powered). Microsoft Windows 2000, Windows XP and Linux drivers normally use this sequence. The order of the steps may, however, be reversed in Windows CE default drivers so changes are required for normal functionality. 3.
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AN10050 NXP Semiconductors Designing a Hi-Speed USB host PCI adapter using ISP1562/63 supply that provides +5 V ± 5 % @ 2 A stabilized can be used. For example, a standard hub power supply. Note the distribution of pull-up resistors in the recommended schematics.
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AN10050 NXP Semiconductors Designing a Hi-Speed USB host PCI adapter using ISP1562/63 are defined on pins 96 (SCL) and 97 (SDA) of the ISP1562, and pins 122 (SCL) and 123 (SDA) of the ISP1563, respectively. When not in use, these signals must be connected to ground using a pull-down resistor, typically 10 kΩ. 3.5 Legacy support: applies only to the ISP1563 Legacy signals, IRQ1, IRQ12, A20OUT, KBIRQ1, MUIRQ12 and SMI#, are not normally used on a PCI add-on card design.
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AN10050 NXP Semiconductors Designing a Hi-Speed USB host PCI adapter using ISP1562/63 4. PCB design recommendations Some important recommendations for a successful PCB design, applicable to both adapter card and motherboard design solutions, are as follows: • Typically, a solution using four layers PCB (signal 1, GND, VCC, signal 2) is sufficient for proper routing, allowing you to obtain good functionality and meeting all compliance tests requirements.
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AN10050 NXP Semiconductors Designing a Hi-Speed USB host PCI adapter using ISP1562/63 • The maximum allowed length of the DP and DM lines for onboard solutions (or [trace + cable length] for a front-panel solution) is 18 inches. • A decoupling capacitor must be placed on VBUS as close as possible to each USB connector. A value of about 150 µF/10 V is recommended on each port.
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AN10050 NXP Semiconductors Designing a Hi-Speed USB host PCI adapter using ISP1562/63 PCI CONNECTOR AD[31:0] PCICLK RST# IDSEL GNT# ISP1562_ES1 USB PORTS POWER CONTROL AD[31:0] PCICLK RST# IDSEL GNT# C/BE0# C/BE1# C/BE2# C/BE3# INTA# REQ# FRAME# C/BE0# C/BE1# C/BE2# C/BE3# INTA# REQ# FRAME# TRDY# IRDY# DEVSEL# STOP# PERR# SERR# PAR PME# TRDY# IRDY# DEVSEL# STOP# PERR# SERR# PAR PME# PWE1# PWE2# OC1# OC2# DM1 DP1 DM2 DP2 PWE1# PWE2# OC1# OC2# DM1 DP1 DM2 DP2 Fig 1.
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Should be placed as close as possible to pin 3 6 GND SDA 5 C9 R4 4.7 kΩ 0.1 μF R5 4.7 kΩ AT24C01A-2.7 U2 1 2 3 4 VCC A0 8 R2 7 A1 NC/WP A3 SCL 6 GND SDA 5 R3 0Ω 0Ω R6 0Ω AT24C01A-2.7 AD[31:0] C/BE0# C/BE1# C/BE2# C/BE3# C/BE0# 60 C/BE1# 48 C/BE2# 35 C/BE3# 23 AVAUX C/BE#[0] C/BE#[1] C/BE#[2] C/BE#[3] 1 17 46 61 72 +3.3 V C50 1 nF C51 1 nF C31 0.1 μF C32 0.1 μF C33 0.1 μF C34 0.
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NXP Semiconductors AN10050_4 Application note CON5 B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 GND −12 V TCK GND TDO +5 V +5 V INTB INTD PRSNT 1 RESERVED PRSNT2 TRST +12 V TMS TDI +5 V INTA INTC +5 V RESERVED VIO RESERVED A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 INTA# INTA# INTA# 3.
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R11 10 kΩ PWE1# PWE1# OC1# OC1# PWE2# C40 0.1 μF OC2# 3 2 10 kΩ PWE2# ENB# OUTB 5 FLGB# 6 GND 10 kΩ R10 R13 10 kΩ 1 R14 10 kΩ ESD1 3 4 2 5 6 1 D1 LED U3 4 R9 C39 0.1 μF OC2# R12 10 kΩ IN FLGA# ENA# OUTA 1 +5V_Standby A C41 +5 VBUS FB8 0.1 μF BLM41PG600SN1 7 8 MIC2526 LED D2 C1 0.01 μF + C3 C2 47 μF / 10 V 1 nF TT1 C42 0.
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AN10050 NXP Semiconductors Designing a Hi-Speed USB host PCI adapter using ISP1562/63 PCI PCICONN.SCH C/BE0# C/BE1# C/BE2# C/BE3# TRDY# IDSEL PME# GNT# RST# INTA# PCICLK REQ# STOP# FRAME# DEVSEL# PERR# SERR# IRDY# PAR AD[31:0] ISP1563_ES1 ISP1563_ES1.SCH C/BE0# C/BE1# C/BE2# C/BE3# TRDY# IDSEL PME# GNT# RST# INTA# PCICLK REQ# STOP# FRAME# DEVSEL# PERR# SERR# IRDY# PAR POWER_SWITCH POWER_SWITCH.
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SEL48M SCL SDA A1 NC/WP A3 SCL GND SDA Rev. 04 — 1 November 2007 3 4 8 7 6 DVAUX 5 C27 0.1 μF AT24C01A-2.7 1 2 VCC A1 3 4 R25 4.7 kΩ R26 4.7 kΩ U4 A0 NC/WP A3 SCL GND SDA 8 R34 7 R35 0Ω 0Ω 6 +3.3 V 4.7 μF C69 R46 0Ω 5 121 122 123 82 81 80 79 78 77 75 74 71 69 68 66 65 62 61 60 44 43 41 40 39 38 37 36 32 31 30 25 24 23 22 20 AT24C01A-2.
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NXP Semiconductors AN10050_4 Application note CON5 B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 GND PCICLK REQ# PCICLK PCICLK REQ# REQ# AD31 AD29 AD27 AD25 C/BE3# C/BE3# AD23 C/BE3# C/BE2# IRDY# DEVSEL# PERR# SERR# C/BE1# AD17 C/BE2# IRDY# C/BE2# DEVSEL# DEVSEL# PERR# PERR# SERR# SERR# C/BE1# AD14 C/BE1# IRDY# AD12 AD10 GND AD8 AD7 AD5 AD3 AD1 AD[31:0] TRST +12 V TMS TDI +5 V INTA INTC +5 V RESERVED VIO RESERVED A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 INTA# INTA# INTA# 3.
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R4 10 kΩ R3 10 kΩ PWE1# PWE1# OC1# OC1# R1 C1 0.1 μF C2 0.1 μF OC2# OC2# PWE2# PWE2# FLGB# R2 2 10 kΩ 1 7 LED D2 MIC2526 +5 VBUS C3 0.1 μF 8 OUTA ENA# A 6 IN FLGA# R7 10 kΩ R5 10 kΩ +5V_Standby GND 10 kΩ 1 5 ENB# OUTB 3 ESD1 3 4 2 5 6 1 D1 LED U3 4 C37 0.01 μF TT1 FB1 BLM41PG600SN1 + C42 C38 47 μF / 10 V 1 nF C4 0.1 μF + C55 220 μF / 10 V C + C54 22 μF / 10 V FB2 TT2 1 + C56 220 μF / 10 V +5 VBUS 47 μF / 10 V C5 0.1 μF FB3 + C40 C59 100 pF C6 0.
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AN10050 NXP Semiconductors Designing a Hi-Speed USB host PCI adapter using ISP1562/63 6. Legal information 6.1 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. 6.
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AN10050 NXP Semiconductors Designing a Hi-Speed USB host PCI adapter using ISP1562/63 7. Contents 1. 2. 3. 3.1 3.2 3.3 3.4 3.5 3.6 4. 5. 6. 6.1 6.2 6.3 7. Introduction .........................................................3 ISP1562/3 initialization........................................3 Description of the application schematics........4 Distribution of power sources and power management support .........................................4 Input clock: applies only to the ISP1563................