Datasheet

LPC1102_1104 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 7 — 26 September 2013 4 of 43
NXP Semiconductors
LPC1102/1104
32-bit ARM Cortex-M0 microcontroller
5. Block diagram
(1) LPC1104 only.
(2) CT32B0_MAT2 LPC1104 only.
Fig 1. LPC1102/1104 block diagram
SRAM
8 kB
ARM
CORTEX-M0
TEST/DEBUG
INTERFACE
FLASH
32 kB
HIGH-SPEED
GPIO
AHB TO APB
BRIDGE
CLOCK
GENERATION,
POWER CONTROL,
SYSTEM
FUNCTIONS
XTALIN
RESET
clocks and
controls
SWD
LPC1102/1104
002aaf524
slave
slave
slave slave
ROM
slave
AHB-LITE BUS
GPIO port
PIO0/1
IRC
POR
SPI
10-bit ADC
UART
32-bit COUNTER/TIMER 0
WDT
IOCONFIG
CT32B0_MAT[3,2
(1)
,1,0]
AD[4:0]
RXD
TXD
SYSTEM CONTROL
PMU
32-bit COUNTER/TIMER 1
CT32B1_MAT[2:0]
CT32B1_CAP0
16-bit COUNTER/TIMER 1
16-bit COUNTER/TIMER 0
CT16B0_MAT[2:0]
SCK0,
MISO0,
MOSI0
system bus
CLKOUT
(1)