Datasheet
UM10398 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2014. All rights reserved.
User manual Rev. 12.3 — 10 June 2014 146 of 547
NXP Semiconductors
UM10398
Chapter 9: LPC111x/LPC11Cxx Pin configuration (LPC1100, LPC1100C,
Fig 20. Pin configuration (LPC11C22/C24)
LPC11C22FBD48/301
LPC11C24FBD48/301
PIO2_6 PIO3_0/DTR
PIO2_0/DTR/SSEL1 R/PIO1_2/AD3/CT32B1_MAT1
RESET/PIO0_0 R/PIO1_1/AD2/CT32B1_MAT0
PIO0_1/CLKOUT/CT32B0_MAT2 R/PIO1_0/AD1/CT32B1_CAP0
V
SS
R/PIO0_11/AD0/CT32B0_MAT3
XTALIN PIO2_11/SCK0
XTALOUT PIO1_10/AD6/CT16B1_MAT1
V
DD
SWCLK/PIO0_10/SCK0/CT16B0_MAT2
PIO1_8/CT16B1_CAP0 PIO0_9/MOSI0/CT16B0_MAT1
PIO0_2/SSEL0/CT16B0_CAP0 PIO0_8/MISO0/CT16B0_MAT0
PIO2_7 PIO2_2/DCD/MISO1
PIO2_8 PIO2_10
PIO2_1/DSR/SCK1 PIO3_3/RI
PIO0_3 PIO1_7/TXD/CT32B0_MAT1
PIO0_4/SCL PIO1_6/RXD/CT32B0_MAT0
PIO0_5/SDA PIO1_5/RTS/CT32B0_CAP0
VDD_CAN V
DD
CANL PIO3_2/DCD
CANH PIO1_11/AD7
V
CC
V
SS
GND PIO1_4/AD5/CT32B1_MAT3/WAKEUP
STB SWDIO/PIO1_3/AD4/CT32B1_MAT2
PIO0_6/SCK0
PIO0_7/CTS
PIO2_3/RI/MOSI1
PIO3_1/DSR
002aaf909
1
2
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36
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32
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25
13
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48
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24