Datasheet

UM10398 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2014. All rights reserved.
User manual Rev. 12.3 — 10 June 2014 529 of 547
NXP Semiconductors
UM10398
Chapter 29: Supplementary information
CANIF2_ARB1, address 0x4005 0090) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . .298
Table 261. CAN message interface arbitration 2 registers
(CANIF1_ARB2, address 0x4005 0034 and
CANIF2_ARB2, address 0x4005 0094) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . .298
Table 262. CAN message interface message control
registers (CANIF1_MCTRL, address
0x4005 0038 and CANIF2_MCTRL, address
0x4005 0098) bit description . . . . . . . . . . . .299
Table 263. CAN message interface data A1 registers
(CANIF1_DA1, address 0x4005 003C and
CANIF2_DA1, address 0x4005 009C) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . .300
Table 264. CAN message interface data A2 registers
(CANIF1_DA2, address 0x4005 0040 and
CANIF2_DA2, address 0x4005 00A0) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . .300
Table 265. CAN message interface data B1 registers
(CANIF1_DB1, address 0x4005 0044 and
CANIF2_DB1, address 0x4005 00A4) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . .301
Table 266. CAN message interface data B2 registers
(CANIF1_DB2, address 0x4005 0048 and
CANIF2_DB2, address 0x4005 00A8) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . .301
Table 267. CAN transmission request 1 register
(CANTXREQ1, address 0x4005 0100) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . .301
Table 268. CAN transmission request 2 register
(CANTXREQ2, address 0x4005 0104) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . .302
Table 269. CAN new data 1 register (CANND1, address
0x4005 0120) bit description . . . . . . . . . . . . .302
Table 270. CAN new data 2 register (CANND2, address
0x4005 0124) bit description . . . . . . . . . . . . .302
Table 271. CAN interrupt pending 1 register (CANIR1,
address 0x4005 0140) bit description. . . . . . .303
Table 272. CAN interrupt pending 2 register (CANIR2,
addresses 0x4005 0144) bit description. . . . .303
Table 273. CAN message valid 1 register (CANMSGV1,
addresses 0x4005 0160) bit description. . . . .303
Table 274. CAN message valid 2 register (CANMSGV2,
address 0x4005 0164) bit description. . . . . . .304
Table 275. CAN clock divider register (CANCLKDIV, address
0x4005 0180) bit description . . . . . . . . . . . . .304
Table 276. Initialization of a transmit object. . . . . . . . . . .313
Table 277. Initialization of a receive object . . . . . . . . . . .314
Table 278. Parameters of the C_CAN bit time. . . . . . . . .318
Table 279. Counter/timer pin description. . . . . . . . . . . . .334
Table 280. Register overview: 16-bit counter/timer 0 CT16B0
(base address 0x4000 C000) . . . . . . . . . . . .335
Table 281. Register overview: 16-bit counter/timer 1 CT16B1
(base address 0x4001 0000) . . . . . . . . . . . .336
Table 282. Interrupt Register (TMR16B0IR - address
0x4000 C000 and TMR16B1IR - address
0x4001 0000) bit description . . . . . . . . . . . . .337
Table 283. Timer Control Register (TMR16B0TCR - address
0x4000 C004 and TMR16B1TCR - address
0x4001 0004) bit description . . . . . . . . . . . . . 337
Table 284: Timer counter registers (TMR16B0TC, address
0x4000 C008 and TMR16B1TC 0x4001 0008) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . . 337
Table 285: Prescale registers (TMR16B0PR, address
0x4000 C00C and TMR16B1PR 0x4001 000C) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . . 338
Table 286: Prescale counter registers (TMR16B0PC,
address 0x4001 C010 and TMR16B1PC
0x4000 0010) bit description . . . . . . . . . . . . . 338
Table 287. Match Control Register (TMR16B0MCR -
address 0x4000 C014 and TMR16B1MCR -
address 0x4001 0014) bit description . . . . . 338
Table 288: Match registers (TMR16B0MR0 to 3, addresses
0x4000 C018 to 24 and TMR16B1MR0 to 3,
addresses 0x4001 0018 to 24) bit description 340
Table 289. Capture Control Register (TMR16B0CCR -
address 0x4000 C028 and TMR16B1CCR -
address 0x4001 0028) bit description . . . . . . 340
Table 290: Capture registers (TMR16B0CR0, address
0x4000 C02C and TMR16B1CR0, address
0x4001 002C) bit description . . . . . . . . . . . . . 340
Table 291. External Match Register (TMR16B0EMR -
address 0x4000 C03C and TMR16B1EMR -
address 0x4001 003C) bit description . . . . . . 341
Table 292. External match control . . . . . . . . . . . . . . . . . 342
Table 293. Count Control Register (TMR16B0CTCR -
address 0x4000 C070 and TMR16B1CTCR -
address 0x4001 0070) bit description . . . . . . 343
Table 294. PWM Control Register (TMR16B0PWMC -
address 0x4000 C074 and TMR16B1PWMC-
address 0x4001 0074) bit description . . . . . . 343
Table 295. Counter/timer pin description . . . . . . . . . . . . 348
Table 296. Register overview: 16-bit counter/timer 0 CT16B0
(base address 0x4000 C000) . . . . . . . . . . . . 349
Table 297. Register overview: 16-bit counter/timer 1 CT16B1
(base address 0x4001 0000) . . . . . . . . . . . . 350
Table 298. Interrupt Register (TMR16B0IR - address
0x4000 C000 and TMR16B1IR - address
0x4001 0000) bit description . . . . . . . . . . . . . 351
Table 299. Timer Control Register (TMR16B0TCR - address
0x4000 C004 and TMR16B1TCR - address
0x4001 0004) bit description . . . . . . . . . . . . . 351
Table 300: Timer counter registers (TMR16B0TC, address
0x4000 C008 and TMR16B1TC 0x4001 0008) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . . 351
Table 301: Prescale registers (TMR16B0PR, address
0x4000 C00C and TMR16B1PR 0x4001 000C) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . . 352
Table 302: Prescale counter registers (TMR16B0PC,
address 0x4001 C010 and TMR16B1PC
0x4000 0010) bit description . . . . . . . . . . . . . 352
Table 303. Match Control Register (TMR16B0MCR -
address 0x4000 C014 and TMR16B1MCR -
address 0x4001 0014) bit description . . . . . 352
Table 304: Match registers (TMR16B0MR0 to 3, addresses
0x4000 C018 to 24 and TMR16B1MR0 to 3,