Datasheet

LPC111X All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 9.2 — 26 March 2014 25 of 127
NXP Semiconductors
LPC1110/11/12/13/14/15
32-bit ARM Cortex-M0 microcontroller
[1] Pin state at reset for default function: I = Input; O = Output; PU = internal pull-up enabled (pins pulled up to full V
DD
level); IA = inactive,
no pull-up/down enabled.
[2] 5 V tolerant pad. RESET
functionality is not available in Deep power-down mode. Use the WAKEUP pin to reset the chip and wake up
from Deep power-down mode. An external pull-up resistor is required on this pin for the Deep power-down mode. See Figure 52
for the
reset pad configuration.
[3] Pad providing digital I/O functions with configurable pull-up/pull-down resistors and configurable hysteresis (see Figure 51
).
[4] I
2
C-bus pads compliant with the I
2
C-bus specification for I
2
C standard mode and I
2
C Fast-mode Plus. The pin requires an external
pull-up to provide output functionality. When power is switched off, this pin is floating and does not disturb the I2C lines. Open-drain
configuration applies to all functions on this pin.
[5] Pad providing digital I/O functions with configurable pull-up/pull-down resistors, configurable hysteresis, and analog input. When
configured as a ADC input, digital section of the pad is disabled (see Figure 51
).
[6] When the system oscillator is not used, connect XTALIN and XTALOUT as follows: XTALIN can be left floating or can be grounded
(grounding is preferred to reduce susceptibility to noise). XTALOUT should be left floating.
SWDIO/PIO1_3/
AD4/CT32B1_MAT2
19
[5]
no I/O I; PU SWDIO — Serial wire debug input/output.
I/O - PIO1_3 — General purpose digital input/output pin.
I-AD4 — A/D converter, input 4.
O-CT32B1_MAT2 — Match output 2 for 32-bit timer 1.
PIO1_4/AD5/
CT32B1_MAT3/
WAKEUP
20
[5]
no I/O I; PU PIO1_4 — General purpose digital input/output pin with 10 ns
glitch filter. In Deep power-down mode, this pin serves as the
Deep power-down mode wake-up pin with 20 ns glitch filter.
Pull this pin HIGH externally before entering Deep power-down
mode. Pull this pin LOW to exit Deep power-down mode. A
LOW-going pulse as short as 50 ns wakes up the part.
I-AD5 — A/D converter, input 5.
O-CT32B1_MAT3 — Match output 3 for 32-bit timer 1.
PIO1_6/RXD/
CT32B0_MAT0
23
[3]
no I/O I; PU PIO1_6 — General purpose digital input/output pin.
I-RXD — Receiver input for UART.
O-CT32B0_MAT0 — Match output 0 for 32-bit timer 0.
PIO1_7/TXD/
CT32B0_MAT1
24
[3]
no I/O I; PU PIO1_7 — General purpose digital input/output pin.
O-TXD — Transmitter output for UART.
O-CT32B0_MAT1 — Match output 1 for 32-bit timer 0.
PIO1_8/
CT16B1_CAP0
6
[3]
no I/O I; PU PIO1_8 — General purpose digital input/output pin.
I-CT16B1_CAP0 — Capture input 0 for 16-bit timer 1.
XTALIN 4
[6]
- I - Input to the oscillator circuit and internal clock generator
circuits. Input voltage must not exceed 1.8 V.
V
DD
5; 22 - I - 1.8 V supply voltage to the internal regulator, the external rail,
and the ADC. Also used as the ADC reference voltage.
V
SS
3; 21 - I - Ground.
Table 6. LPC1100L series: LPC1112 (HVQFN24 package)
…continued
Symbol HVQFN
pin
Start
logic
input
Type Reset
state
[1]
Description