Datasheet

LPC111X All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 9.2 — 26 March 2014 82 of 127
NXP Semiconductors
LPC1110/11/12/13/14/15
32-bit ARM Cortex-M0 microcontroller
10.8 CoreMark data
Remark: All CoreMark data were taken with the Keil uVision v. 4.6 tool.
V
DD
= 3.3 V; T = 25 °C; active mode; typical samples.
Fig 33. CoreMark score for different Power API modes
V
DD
= 3.3 V; T = 25 °C; active mode; typical samples. System oscillator enabled; main clock
derived from external clock signal; PLL and SYSAHBCLKDIV enabled for frequencies > 20 MHz.
Fig 34. CoreMark current consumption for different power modes using external clock
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