Datasheet

LPC111X All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 9.2 — 26 March 2014 76 of 127
NXP Semiconductors
LPC1110/11/12/13/14/15
32-bit ARM Cortex-M0 microcontroller
Conditions: V
DD
= 3.3 V; active mode entered executing code while(1){} from flash; all
peripherals disabled in the SYSAHBCLKCTRL register (SYSAHBCLKCTRL = 0x1F); all peripheral
clocks disabled; internal pull-up resistors disabled; BOD disabled; low-current mode.
(1) System oscillator and system PLL disabled; IRC enabled.
(2) System oscillator and system PLL enabled; IRC disabled.
Fig 24. Active mode: Typical supply current I
DD
versus temperature for different system
clock frequencies (for LPC111x/002/102/202/302)
Conditions: V
DD
= 3.3 V; sleep mode entered from flash; all peripherals disabled in the
SYSAHBCLKCTRL register (SYSAHBCLKCTRL = 0x1F); all peripheral clocks disabled; internal
pull-up resistors disabled; BOD disabled; low-current mode.
(1) System oscillator and system PLL disabled; IRC enabled.
(2) System oscillator and system PLL enabled; IRC disabled.
Fig 25. Sleep mode: Typical supply current I
DD
versus temperature for different system
clock frequencies (for LPC111x/002/102/202/302)
002aaf981
temperature (°C)
−40 853510 60−15
2
8
6
4
10
I
DD
(mA)
0
12 MHz
(1)
24 MHz
(2)
36 MHz
(2)
48 MHz
(2)
temperature (°C)
−40 853510 60−15
002aaf982
2
4
6
I
DD
(mA)
0
12 MHz
(1)
24 MHz
(2)
36 MHz
(2)
48 MHz
(2)