Datasheet

UM10398 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2014. All rights reserved.
User manual Rev. 12.3 — 10 June 2014 173 of 547
NXP Semiconductors
UM10398
Chapter 10: LPC111x Pin configuration (LPC1100L series, TSSOP, DIP,
[5] When the system oscillator is not used, connect XTALIN and XTALOUT as follows: XTALIN can be left floating or can be grounded
(grounding is preferred to reduce susceptibility to noise). XTALOUT should be left floating.
10.4 Pin configuration (LPC1112/14)
Fig 25. Pin configuration TSSOP28 package
LPC1112FDH28/102
LPC1114FDH28/102
PIO0_8/MISO0/CT16B0_MAT0 PIO0_7/CTS
PIO0_9/MOSI0/CT16B0_MAT1 PIO0_4/SCL
SWCLK/PIO0_10/SCK0/CT16B0_MAT2 PIO0_3
R/PIO0_11/AD0/CT32B0_MAT3 PIO0_2/SSEL0/CT16B0_CAP0
PIO0_5/SDA PIO0_1/CLKOUT/CT32B0_MAT2
PIO0_6/SCK0 RESET/PIO0_0
V
DDA
V
SS
V
SSA
V
DD
R/PIO1_0/AD1/CT32B1_CAP0 XTALIN
R/PIO1_1/AD2/CT32B1_MAT0 XTALOUT
R/PIO1_2/AD3/CT32B1_MAT1 PIO1_9/CT16B1_MAT0
SWDIO/PIO1_3/AD4/CT32B1_MAT2 PIO1_8/CT16B1_CAP0
PIO1_4/AD5/CT32B1_MAT3/WAKEUP PIO1_7/TXD/CT32B0_MAT1
PIO1_5/RTS/CT32B0_CAP0 PIO1_6/RXD/CT32B0_MAT0
002aag598
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Fig 26. Pin configuration DIP28 package
LPC1114FN28/
102
PIO0_8/MISO0/CT16B0_MAT0 PIO0_7/CTS
PIO0_9/MOSI0/CT16B0_MAT1 PIO0_4/SCL
SWCLK/PIO0_10/SCK0/CT16B0_MAT2 PIO0_3
R/PIO0_11/AD0/CT32B0_MAT3 PIO0_2/SSEL0/CT16B0_CAP0
PIO0_5/SDA PIO0_1/CLKOUT/CT32B0_MAT2
PIO0_6/SCK0 RESET/PIO0_0
V
DDA
V
SS
V
SSA
V
DD
R/PIO1_0/AD1/CT32B1_CAP0 XTALIN
R/PIO1_1/AD2/CT32B1_MAT0 XTALOUT
R/PIO1_2/AD3/CT32B1_MAT1 PIO1_9/CT16B1_MAT0
SWDIO/PIO1_3/AD4/CT32B1_MAT2 PIO1_8/CT16B1_CAP0
PIO1_4/AD5/CT32B1_MAT3/WAKEUP PIO1_7/TXD/CT32B0_MAT1
PIO1_5/RTS/CT32B0_CAP0 PIO1_6/RXD/CT32B0_MAT0
002aag599
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