Datasheet

UM10398 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2014. All rights reserved.
User manual Rev. 12.3 — 10 June 2014 257 of 547
NXP Semiconductors
UM10398
Chapter 15: LPC111x/LPC11Cxx I2C-bus controller
In Figure 54 to Figure 58, circles are used to indicate when the serial interrupt flag is set.
The numbers in the circles show the status code held in the STAT register. At these points,
a service routine must be executed to continue or complete the serial transfer. These
service routines are not critical since the serial transfer is suspended until the serial
interrupt flag is cleared by software.
When a serial interrupt routine is entered, the status code in STAT is used to branch to the
appropriate service routine. For each status code, the required software action and details
of the following serial transfer are given in tables from Table 236
to Table 242.
15.10.1 Master Transmitter mode
In the master transmitter mode, a number of data bytes are transmitted to a slave receiver
(see Figure 54
). Before the master transmitter mode can be entered, I2CON must be
initialized as follows:
The I
2
C rate must also be configured in the SCLL and SCLH registers. I2EN must be set
to logic 1 to enable the I
2
C block. If the AA bit is reset, the I
2
C block will not acknowledge
its own slave address or the General Call address in the event of another device
becoming master of the bus. In other words, if AA is reset, the I
2
C interface cannot enter
slave mode. STA, STO, and SI must be reset.
Table 234. Abbreviations used to describe an I
2
C operation
Abbreviation Explanation
S START Condition
SLA 7-bit slave address
R Read bit (HIGH level at SDA)
W Write bit (LOW level at SDA)
A Acknowledge bit (LOW level at SDA)
A
Not acknowledge bit (HIGH level at SDA)
Data 8-bit data byte
P STOP condition
Table 235. I2C0CONSET used to initialize Master Transmitter mode
Bit 7 6 5 4 3 2 1 0
Symbol - I2EN STA STO SI AA - -
Value- 1000x- -