Datasheet
UM10398 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2014. All rights reserved.
User manual Rev. 12.3 — 10 June 2014 348 of 547
NXP Semiconductors
UM10398
Chapter 19: LPC1100XL series: 16-bit counter/timer CT16B0/1
19.4 Applications
• Interval timer for counting internal events
• Pulse Width Demodulator via capture input
• Free-running timer
• Pulse Width Modulator via match outputs
19.5 Description
Each Counter/timer is designed to count cycles of the peripheral clock (PCLK) or an
externally supplied clock and can optionally generate interrupts or perform other actions at
specified timer values based on four match registers. The peripheral clock is provided by
the system clock (see Figure 8
). Each counter/timer also includes one capture input to
trap the timer value when an input signal transitions, optionally generating an interrupt.
In PWM mode, three match registers on CT16B0 and two match registers on CT16B1 can
be used to provide a single-edge controlled PWM output on the match output pins. It is
recommended to use the match registers that are not pinned out to control the PWM cycle
length.
Remark: The 16-bit counter/timer0 (CT16B0) and the 16-bit counter/timer1 (CT16B1) are
functionally identical except for the peripheral base address.
19.6 Pin description
Table 295 gives a brief summary of each of the counter/timer related pins.
19.7 Register description
The 16-bit counter/timer0 contains the registers shown in Table 296 and the 16-bit
counter/timer1 contains the registers shown in Table 297
. More detailed descriptions
follow.
Table 295. Counter/timer pin description
Pin Type Description
CT16B0_CAP[1:0]
CT16B1_CAP0[1:0]
Input Capture Signal:
A transition on a capture pin can be configured to load the Capture Register with the
value in the counter/timer and optionally generate an interrupt.
Counter/Timer block can select a capture signal as a clock source instead of the PCLK
derived clock. For more details see Section 19.7.11
.
CT16B0_MAT[2:0]
CT16B1_MAT[1:0]
Output External Match Outputs of CT16B0/1:
When a match register of CT16B0/1 (MR3:0) equals the timer counter (TC), this output
can either toggle, go LOW, go HIGH, or do nothing. The External Match Register
(EMR) and the PWM Control Register (PWMCON) control the functionality of this
output.