Datasheet

UM10398 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2014. All rights reserved.
User manual Rev. 12.3 — 10 June 2014 447 of 547
NXP Semiconductors
UM10398
Chapter 26: LPC111x/LPC11Cxx Flash programming firmware
26.10 Flash signature generation
The flash module contains a built-in signature generator. This generator can produce a
128-bit signature from a range of flash memory. A typical usage is to verify the flashed
contents against a calculated signature (e.g. during programming).
The address range for generating a signature must be aligned on flash-word boundaries,
i.e. 128-bit boundaries. Once started, signature generation completes independently.
While signature generation is in progress, the flash memory cannot be accessed for other
purposes, and an attempted read will cause a wait state to be asserted until signature
generation is complete. Code outside of the flash (e.g. internal RAM) can be executed
during signature generation. This can include interrupt services, if the interrupt vector
table is re-mapped to memory other than the flash memory. The code that initiates
signature generation should also be placed outside of the flash memory.
26.10.1 Register description for signature generation
26.10.1.1 Signature generation address and control registers
These registers control automatic signature generation. A signature can be generated for
any part of the flash memory contents. The address range to be used for generation is
defined by writing the start address to the signature start address register (FMSSTART)
and the stop address to the signature stop address register (FMSSTOP. The start and
stop addresses must be aligned to 128-bit boundaries and can be derived by dividing the
byte address by 16.
Signature generation is started by setting the SIG_START bit in the FMSSTOP register.
Setting the SIG_START bit is typically combined with the signature stop address in a
single write.
Table 410
and Table 411 show the bit assignments in the FMSSTART and FMSSTOP
registers respectively.
Table 409. Register overview: FMC (base address 0x4003 C000)
Name Access Address
offset
Description Reset
value
Reference
FMSSTART R/W 0x020 Signature start address register 0 Table 410
FMSSTOP R/W 0x024 Signature stop-address register 0 Table 411
FMSW0 R 0x02C Word 0 [31:0] - Table 412
FMSW1 R 0x030 Word 1 [63:32] - Table 413
FMSW2 R 0x034 Word 2 [95:64] - Table 414
FMSW3 R 0x038 Word 3 [127:96] - Table 415
FMSTAT R 0xFE0 Signature generation status register 0
Section 26.
10.1.3
FMSTATCLR W 0xFE8 Signature generation status clear
register
-
Section 26.
10.1.4